📄 de2_nios.map.rpt
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Analysis & Synthesis report for DE2_NIOS
Tue Jul 25 22:56:32 2006
Version 6.0 Build 202 06/20/2006 Service Pack 1 SJ Full Version
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; Table of Contents ;
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1. Legal Notice
2. Analysis & Synthesis Summary
3. Analysis & Synthesis Settings
4. Analysis & Synthesis Source Files Read
5. Analysis & Synthesis Resource Usage Summary
6. Analysis & Synthesis Resource Utilization by Entity
7. Analysis & Synthesis RAM Summary
8. Analysis & Synthesis DSP Block Usage Summary
9. State Machine - |DE2_NIOS|I2C_AV_Config:u1|mSetup_ST
10. State Machine - |DE2_NIOS|system_0:u0|sdram_0:the_sdram_0|i_state
11. State Machine - |DE2_NIOS|system_0:u0|sdram_0:the_sdram_0|i_next
12. State Machine - |DE2_NIOS|system_0:u0|sdram_0:the_sdram_0|m_state
13. State Machine - |DE2_NIOS|system_0:u0|sdram_0:the_sdram_0|m_next
14. State Machine - |DE2_NIOS|system_0:u0|clock_1:the_clock_1|clock_1_master_FSM:master_FSM|master_state
15. State Machine - |DE2_NIOS|system_0:u0|clock_1:the_clock_1|clock_1_slave_FSM:slave_FSM|slave_state
16. State Machine - |DE2_NIOS|system_0:u0|clock_0:the_clock_0|clock_0_master_FSM:master_FSM|master_state
17. State Machine - |DE2_NIOS|system_0:u0|clock_0:the_clock_0|clock_0_slave_FSM:slave_FSM|slave_state
18. State Machine - |DE2_NIOS|system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_jtag_debug_module_wrapper:the_cpu_0_jtag_debug_module_wrapper|cpu_0_jtag_debug_module:the_cpu_0_jtag_debug_module1|DRsize
19. Registers Protected by Synthesis
20. Logic Cells Representing Combinational Loops
21. General Register Statistics
22. Inverted Register Statistics
23. Multiplexer Restructuring Statistics (Restructuring Performed)
24. Source assignments for system_0:u0|Audio_0:the_Audio_0|AUDIO_DAC_FIFO:the_AUDIO_DAC_FIFO|FIFO_16_256:u0|dcfifo:dcfifo_component
25. Source assignments for system_0:u0|Audio_0:the_Audio_0|AUDIO_DAC_FIFO:the_AUDIO_DAC_FIFO|FIFO_16_256:u0|dcfifo:dcfifo_component|dcfifo_e6c1:auto_generated
26. Source assignments for system_0:u0|Audio_0:the_Audio_0|AUDIO_DAC_FIFO:the_AUDIO_DAC_FIFO|FIFO_16_256:u0|dcfifo:dcfifo_component|dcfifo_e6c1:auto_generated|altsyncram_1731:fifo_ram
27. Source assignments for system_0:u0|Audio_0:the_Audio_0|AUDIO_DAC_FIFO:the_AUDIO_DAC_FIFO|FIFO_16_256:u0|dcfifo:dcfifo_component|dcfifo_e6c1:auto_generated|altsyncram_1731:fifo_ram|altsyncram_brg1:altsyncram4
28. Source assignments for system_0:u0|Audio_0:the_Audio_0|AUDIO_DAC_FIFO:the_AUDIO_DAC_FIFO|FIFO_16_256:u0|dcfifo:dcfifo_component|dcfifo_e6c1:auto_generated|alt_synch_pipe_nc8:rs_dgwp
29. Source assignments for system_0:u0|Audio_0:the_Audio_0|AUDIO_DAC_FIFO:the_AUDIO_DAC_FIFO|FIFO_16_256:u0|dcfifo:dcfifo_component|dcfifo_e6c1:auto_generated|alt_synch_pipe_nc8:rs_dgwp|dffpipe_hd9:dffpipe6
30. Source assignments for system_0:u0|Audio_0:the_Audio_0|AUDIO_DAC_FIFO:the_AUDIO_DAC_FIFO|FIFO_16_256:u0|dcfifo:dcfifo_component|dcfifo_e6c1:auto_generated|alt_synch_pipe_hn7:wrempty_reg
31. Source assignments for system_0:u0|Audio_0:the_Audio_0|AUDIO_DAC_FIFO:the_AUDIO_DAC_FIFO|FIFO_16_256:u0|dcfifo:dcfifo_component|dcfifo_e6c1:auto_generated|alt_synch_pipe_hn7:wrempty_reg|dffpipe_bo8:dffpipe9
32. Source assignments for system_0:u0|Audio_0:the_Audio_0|AUDIO_DAC_FIFO:the_AUDIO_DAC_FIFO|FIFO_16_256:u0|dcfifo:dcfifo_component|dcfifo_e6c1:auto_generated|alt_synch_pipe_oc8:ws_dgrp
33. Source assignments for system_0:u0|Audio_0:the_Audio_0|AUDIO_DAC_FIFO:the_AUDIO_DAC_FIFO|FIFO_16_256:u0|dcfifo:dcfifo_component|dcfifo_e6c1:auto_generated|alt_synch_pipe_oc8:ws_dgrp|dffpipe_id9:dffpipe11
34. Source assignments for system_0:u0|VGA_0:the_VGA_0|VGA_NIOS_CTRL:the_VGA_NIOS_CTRL|VGA_OSD_RAM:u1|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated
35. Source assignments for system_0:u0|VGA_0:the_VGA_0|VGA_NIOS_CTRL:the_VGA_NIOS_CTRL|VGA_OSD_RAM:u1|Img_RAM:u0|altsyncram:altsyncram_component|altsyncram_q7o1:auto_generated|altsyncram_p132:altsyncram1
36. Source assignments for system_0:u0|clock_0:the_clock_0
37. Source assignments for system_0:u0|clock_0:the_clock_0|clock_0_master_read_done_sync_module:clock_0_master_read_done_sync
38. Source assignments for system_0:u0|clock_0:the_clock_0|clock_0_master_write_done_sync_module:clock_0_master_write_done_sync
39. Source assignments for system_0:u0|clock_0:the_clock_0|clock_0_slave_read_request_sync_module:clock_0_slave_read_request_sync
40. Source assignments for system_0:u0|clock_0:the_clock_0|clock_0_slave_write_request_sync_module:clock_0_slave_write_request_sync
41. Source assignments for system_0:u0|clock_0:the_clock_0|clock_0_bit_pipe:endofpacket_bit_pipe
42. Source assignments for system_0:u0|clock_1:the_clock_1
43. Source assignments for system_0:u0|clock_1:the_clock_1|clock_1_master_read_done_sync_module:clock_1_master_read_done_sync
44. Source assignments for system_0:u0|clock_1:the_clock_1|clock_1_master_write_done_sync_module:clock_1_master_write_done_sync
45. Source assignments for system_0:u0|clock_1:the_clock_1|clock_1_slave_read_request_sync_module:clock_1_slave_read_request_sync
46. Source assignments for system_0:u0|clock_1:the_clock_1|clock_1_slave_write_request_sync_module:clock_1_slave_write_request_sync
47. Source assignments for system_0:u0|clock_1:the_clock_1|clock_1_bit_pipe:endofpacket_bit_pipe
48. Source assignments for system_0:u0|cpu_0:the_cpu_0|cpu_0_ic_data_module:cpu_0_ic_data|altsyncram:the_altsyncram|altsyncram_cub1:auto_generated
49. Source assignments for system_0:u0|cpu_0:the_cpu_0|cpu_0_ic_data_module:cpu_0_ic_data|altsyncram:the_altsyncram|altsyncram_cub1:auto_generated|altsyncram_k1l1:altsyncram1
50. Source assignments for system_0:u0|cpu_0:the_cpu_0|cpu_0_ic_tag_module:cpu_0_ic_tag|altsyncram:the_altsyncram|altsyncram_tke1:auto_generated
51. Source assignments for system_0:u0|cpu_0:the_cpu_0|cpu_0_bht_module:cpu_0_bht|altsyncram:the_altsyncram|altsyncram_q8e1:auto_generated
52. Source assignments for system_0:u0|cpu_0:the_cpu_0|cpu_0_bht_module:cpu_0_bht|altsyncram:the_altsyncram|altsyncram_q8e1:auto_generated|altsyncram_pfn1:altsyncram1
53. Source assignments for system_0:u0|cpu_0:the_cpu_0|cpu_0_register_bank_a_module:cpu_0_register_bank_a|altsyncram:the_altsyncram|altsyncram_4be1:auto_generated
54. Source assignments for system_0:u0|cpu_0:the_cpu_0|cpu_0_register_bank_b_module:cpu_0_register_bank_b|altsyncram:the_altsyncram|altsyncram_5be1:auto_generated
55. Source assignments for system_0:u0|cpu_0:the_cpu_0|cpu_0_dc_tag_module:cpu_0_dc_tag|altsyncram:the_altsyncram|altsyncram_vf22:auto_generated
56. Source assignments for system_0:u0|cpu_0:the_cpu_0|cpu_0_dc_data_module:cpu_0_dc_data|altsyncram:the_altsyncram|altsyncram_a422:auto_generated
57. Source assignments for system_0:u0|cpu_0:the_cpu_0|cpu_0_mult_cell:the_cpu_0_mult_cell|altmult_add:the_altmult_add_part_1|mult_add_4cr2:auto_generated|ded_mult_2o81:ded_mult1|dffpipe_93c:pre_result
58. Source assignments for system_0:u0|cpu_0:the_cpu_0|cpu_0_mult_cell:the_cpu_0_mult_cell|altmult_add:the_altmult_add_part_2|mult_add_6cr2:auto_generated|ded_mult_2o81:ded_mult1|dffpipe_93c:pre_result
59. Source assignments for system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_ocimem:the_cpu_0_nios2_ocimem|cpu_0_ociram_lpm_dram_bdp_component_module:cpu_0_ociram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_c572:auto_generated
60. Source assignments for system_0:u0|cpu_0:the_cpu_0|cpu_0_nios2_oci:the_cpu_0_nios2_oci|cpu_0_nios2_oci_im:the_cpu_0_nios2_oci_im|cpu_0_traceram_lpm_dram_bdp_component_module:cpu_0_traceram_lpm_dram_bdp_component|altsyncram:the_altsyncram|altsyncram_e502:auto_generated
61. Source assignments for system_0:u0|epcs_controller:the_epcs_controller|altsyncram:the_boot_copier_rom|altsyncram_lo31:auto_generated
62. Source assignments for system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_w:the_jtag_uart_0_scfifo_w|scfifo:wfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2
63. Source assignments for system_0:u0|jtag_uart_0:the_jtag_uart_0|jtag_uart_0_scfifo_r:the_jtag_uart_0_scfifo_r|scfifo:rfifo|scfifo_1n21:auto_generated|a_dpfifo_8t21:dpfifo|dpram_5h21:FIFOram|altsyncram_9tl1:altsyncram2
64. Source assignments for system_0:u0|sdram_0:the_sdram_0
65. Source assignments for system_0:u0|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave
66. Source assignments for system_0:u0|system_0_reset_clk_domain_synch_module:system_0_reset_clk_domain_synch
67. Source assignments for system_0:u0|system_0_reset_clk_50_domain_synch_module:system_0_reset_clk_50_domain_synch
68. Source assignments for sld_hub:sld_hub_inst
69. Source assignments for sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine
70. Source assignments for sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG
71. Source assignments for I2C_AV_Config:u1|altsyncram:Ram0_rtl_0|altsyncram_jgv:auto_generated
72. Parameter Settings for User Entity Instance: SDRAM_PLL:PLL1|altpll:altpll_component
73. Parameter Settings for User Entity Instance: Audio_PLL:PLL2|altpll:altpll_component
74. Parameter Settings for User Entity Instance: system_0:u0|Audio_0:the_Audio_0|AUDIO_DAC_FIFO:the_AUDIO_DAC_FIFO
75. Parameter Settings for User Entity Instance: system_0:u0|Audio_0:the_Audio_0|AUDIO_DAC_FIFO:the_AUDIO_DAC_FIFO|FIFO_16_256:u0|dcfifo:dcfifo_component
76. Parameter Settings for User Entity Instance: system_0:u0|VGA_0:the_VGA_0|VGA_NIOS_CTRL:the_VGA_NIOS_CTRL
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