de2_nios.fit.rpt

DE2开发板上的资料,主要是他的例子,含有各种接口程序,如VGA,USB,LCD等

to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.



+------------------------------------------------------------------------------------+
; Fitter Summary                                                                     ;
+------------------------------------+-----------------------------------------------+
; Fitter Status                      ; Successful - Tue Jul 25 23:01:46 2006         ;
; Quartus II Version                 ; 6.0 Build 202 06/20/2006 SP 1 SJ Full Version ;
; Revision Name                      ; DE2_NIOS                                      ;
; Top-level Entity Name              ; DE2_NIOS                                      ;
; Family                             ; Cyclone II                                    ;
; Device                             ; EP2C35F672C6                                  ;
; Timing Models                      ; Final                                         ;
; Total logic elements               ; 6,265 / 33,216 ( 19 % )                       ;
; Total registers                    ; 3443                                          ;
; Total pins                         ; 429 / 475 ( 90 % )                            ;
; Total virtual pins                 ; 0                                             ;
; Total memory bits                  ; 387,584 / 483,840 ( 80 % )                    ;
; Embedded Multiplier 9-bit elements ; 4 / 70 ( 6 % )                                ;
; Total PLLs                         ; 2 / 4 ( 50 % )                                ;
+------------------------------------+-----------------------------------------------+


+------------------------------------------------------------------------------------------------------------------+
; Fitter Settings                                                                                                  ;
+------------------------------------------------+--------------------------------+--------------------------------+
; Option                                         ; Setting                        ; Default Value                  ;
+------------------------------------------------+--------------------------------+--------------------------------+
; Device                                         ; EP2C35F672C6                   ;                                ;
; Use smart compilation                          ; Off                            ; Off                            ;
; Router Timing Optimization Level               ; Normal                         ; Normal                         ;
; Placement Effort Multiplier                    ; 1.0                            ; 1.0                            ;
; Router Effort Multiplier                       ; 1.0                            ; 1.0                            ;
; Optimize Hold Timing                           ; IO Paths and Minimum TPD Paths ; IO Paths and Minimum TPD Paths ;
; Optimize Fast-Corner Timing                    ; Off                            ; Off                            ;
; PowerPlay Power Optimization                   ; Normal compilation             ; Normal compilation             ;
; Optimize Timing                                ; Normal compilation             ; Normal compilation             ;
; Optimize IOC Register Placement for Timing     ; On                             ; On                             ;
; Limit to One Fitting Attempt                   ; Off                            ; Off                            ;
; Final Placement Optimizations                  ; Automatically                  ; Automatically                  ;
; Fitter Aggressive Routability Optimizations    ; Automatically                  ; Automatically                  ;
; Fitter Initial Placement Seed                  ; 1                              ; 1                              ;
; PCI I/O                                        ; Off                            ; Off                            ;
; Weak Pull-Up Resistor                          ; Off                            ; Off                            ;
; Enable Bus-Hold Circuitry                      ; Off                            ; Off                            ;