de2_board.tan.summary

来自「DE2开发板上的资料,主要是他的例子,含有各种接口程序,如VGA,USB,LCD」· SUMMARY 代码 · 共 77 行

--------------------------------------------------------------------------------------
Timing Analyzer Summary
--------------------------------------------------------------------------------------

Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 3.197 ns
From           : FL_DQ[4]
To             : DE2_Board:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|incoming_tri_state_bridge_0_data[4]
From Clock     : --
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 10.391 ns
From           : delay_reset_block:inst3|reset_counter:inst|lpm_counter:lpm_counter_component|cntr_8bc:auto_generated|safe_q[0]
To             : FL_RST_N
From Clock     : CLOCK_50
To Clock       : --
Failed Paths   : 0

Type           : Worst-case tpd
Slack          : N/A
Required Time  : None
Actual Time    : 12.166 ns
From           : KEY[0]
To             : FL_RST_N
From Clock     : --
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 0.391 ns
From           : altera_internal_jtag
To             : DE2_Board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|wdata[7]
From Clock     : --
To Clock       : altera_internal_jtag~TCKUTAP
Failed Paths   : 0

Type           : Clock Setup: 'CLOCK_50'
Slack          : N/A
Required Time  : None
Actual Time    : 71.19 MHz ( period = 14.046 ns )
From           : DE2_Board:inst|cpu_0:the_cpu_0|W_alu_result[18]
To             : DE2_Board:inst|payload_buffer:the_payload_buffer|altsyncram:the_altsyncram|altsyncram_l331:auto_generated|ram_block1a29~porta_address_reg11
From Clock     : CLOCK_50
To Clock       : CLOCK_50
Failed Paths   : 0

Type           : Clock Setup: 'altera_internal_jtag~TCKUTAP'
Slack          : N/A
Required Time  : None
Actual Time    : 165.51 MHz ( period = 6.042 ns )
From           : DE2_Board:inst|jtag_uart_0:the_jtag_uart_0|alt_jtag_atlantic:jtag_uart_0_alt_jtag_atlantic|td_shift[0]
To             : sld_hub:sld_hub_inst|hub_tdo
From Clock     : altera_internal_jtag~TCKUTAP
To Clock       : altera_internal_jtag~TCKUTAP
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

--------------------------------------------------------------------------------------