📄 gpio.lst
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##############################################################################
# #
# IAR ARM ANSI C/C++ Compiler V4.30A/W32 08/Nov/2005 12:06:34 #
# Copyright 1999-2005 IAR Systems. All rights reserved. #
# #
# Cpu mode = interwork #
# Endian = little #
# Stack alignment = 4 #
# Source file = D:\Book-IAR\examples_ST\STR71x_ADC\source\gpio.c #
# Command line = D:\Book-IAR\examples_ST\STR71x_ADC\source\gpio.c #
# -lC D:\Book-IAR\examples_ST\STR71x_ADC\Debug\List\ #
# -o D:\Book-IAR\examples_ST\STR71x_ADC\Debug\Obj\ #
# -s2 --no_cse --no_unroll --no_inline #
# --no_code_motion --no_tbaa --no_clustering #
# --no_scheduling --debug --cpu_mode arm --endian #
# little --cpu ARM7TDMI --stack_align 4 --interwork #
# -e --fpu None --dlib_config "d:\IAR #
# Systems\Embedded Workbench #
# 4.0\arm\LIB\dl4tpainl8n.h" -I #
# D:\Book-IAR\examples_ST\STR71x_ADC\ -I #
# D:\Book-IAR\examples_ST\STR71x_ADC\include\ -I #
# D:\Book-IAR\examples_ST\STR71x_ADC\source\ -I #
# "d:\IAR Systems\Embedded Workbench 4.0\arm\INC\" #
# List file = D:\Book-IAR\examples_ST\STR71x_ADC\Debug\List\gpio.l #
# st #
# Object file = D:\Book-IAR\examples_ST\STR71x_ADC\Debug\Obj\gpio.r7 #
# 9 #
# #
# #
##############################################################################
D:\Book-IAR\examples_ST\STR71x_ADC\source\gpio.c
1 // gpio.c
2
3 #include "gpio.h"
4
5 /*******************************************************************************
6 * 说明：GPIO_Config函数，配置GPIO断口引脚
7 * 参数：GPIOx (x=0,1,2)为所选端口，Port_Pins为引脚安排，GPIO_Mode为引脚模式
8 * 返回值：无
9 *******************************************************************************/
\ In segment CODE, align 4, keep-with-next
10 void GPIO_Config (GPIO_TypeDef *GPIOx, u16 Port_Pins, GpioPinMode_TypeDef GPIO_Mode) {
11 switch (GPIO_Mode) {
\ GPIO_Config:
\ 00000000 0230A0E1 MOV R3,R2
\ 00000004 070053E3 CMP R3,#+0x7
\ 00000008 5F00008A BHI ??GPIO_Config_1
\ 0000000C 01CF8FE2 ADR R12,??GPIO_Config_0
\ 00000010 03C0DCE7 LDRB R12,[R12, R3]
\ 00000014 0CF18FE0 ADD PC,PC,R12, LSL #+0x2
\ ??GPIO_Config_0:
\ 00000018 010E1A26 DC8 +0x1,+0xE,+0x1A,+0x26
\ 0000001C 313D4853 DC8 +0x31,+0x3D,+0x48,+0x53
12 case GPIO_HI_AIN_TRI:
13 GPIOx->PC0&=~Port_Pins;
\ ??GPIO_Config_2:
\ 00000020 B030D0E1 LDRH R3,[R0, #+0]
\ 00000024 01C0E0E1 MVN R12,R1
\ 00000028 03301CE0 ANDS R3,R12,R3
\ 0000002C B030C0E1 STRH R3,[R0, #+0]
14 GPIOx->PC1&=~Port_Pins;
\ 00000030 B430D0E1 LDRH R3,[R0, #+0x4]
\ 00000034 01C0E0E1 MVN R12,R1
\ 00000038 03301CE0 ANDS R3,R12,R3
\ 0000003C B430C0E1 STRH R3,[R0, #+0x4]
15 GPIOx->PC2&=~Port_Pins;
\ 00000040 B830D0E1 LDRH R3,[R0, #+0x8]
\ 00000044 01C0E0E1 MVN R12,R1
\ 00000048 03301CE0 ANDS R3,R12,R3
\ 0000004C B830C0E1 STRH R3,[R0, #+0x8]
\ 00000050 4D0000EA B ??GPIO_Config_1
16 break;
17 case GPIO_IN_TRI_TTL:
18 GPIOx->PC0|=Port_Pins;
\ ??GPIO_Config_3:
\ 00000054 B030D0E1 LDRH R3,[R0, #+0]
\ 00000058 033091E1 ORRS R3,R1,R3
\ 0000005C B030C0E1 STRH R3,[R0, #+0]
19 GPIOx->PC1&=~Port_Pins;
\ 00000060 B430D0E1 LDRH R3,[R0, #+0x4]
\ 00000064 01C0E0E1 MVN R12,R1
\ 00000068 03301CE0 ANDS R3,R12,R3
\ 0000006C B430C0E1 STRH R3,[R0, #+0x4]
20 GPIOx->PC2&=~Port_Pins;
\ 00000070 B830D0E1 LDRH R3,[R0, #+0x8]
\ 00000074 01C0E0E1 MVN R12,R1
\ 00000078 03301CE0 ANDS R3,R12,R3
\ 0000007C B830C0E1 STRH R3,[R0, #+0x8]
\ 00000080 410000EA B ??GPIO_Config_1
21 break;
22 case GPIO_IN_TRI_CMOS:
23 GPIOx->PC0&=~Port_Pins;
\ ??GPIO_Config_4:
\ 00000084 B030D0E1 LDRH R3,[R0, #+0]
\ 00000088 01C0E0E1 MVN R12,R1
\ 0000008C 03301CE0 ANDS R3,R12,R3
\ 00000090 B030C0E1 STRH R3,[R0, #+0]
24 GPIOx->PC1|=Port_Pins;
\ 00000094 B430D0E1 LDRH R3,[R0, #+0x4]
\ 00000098 033091E1 ORRS R3,R1,R3
\ 0000009C B430C0E1 STRH R3,[R0, #+0x4]
25 GPIOx->PC2&=~Port_Pins;
\ 000000A0 B830D0E1 LDRH R3,[R0, #+0x8]
\ 000000A4 01C0E0E1 MVN R12,R1
\ 000000A8 03301CE0 ANDS R3,R12,R3
\ 000000AC B830C0E1 STRH R3,[R0, #+0x8]
\ 000000B0 350000EA B ??GPIO_Config_1
26 break;
27 case GPIO_IPUPD_WP:
28 GPIOx->PC0|=Port_Pins;
\ ??GPIO_Config_5:
\ 000000B4 B030D0E1 LDRH R3,[R0, #+0]
\ 000000B8 033091E1 ORRS R3,R1,R3
\ 000000BC B030C0E1 STRH R3,[R0, #+0]
29 GPIOx->PC1|=Port_Pins;
\ 000000C0 B430D0E1 LDRH R3,[R0, #+0x4]
\ 000000C4 033091E1 ORRS R3,R1,R3
\ 000000C8 B430C0E1 STRH R3,[R0, #+0x4]
30 GPIOx->PC2&=~Port_Pins;
\ 000000CC B830D0E1 LDRH R3,[R0, #+0x8]
\ 000000D0 01C0E0E1 MVN R12,R1
\ 000000D4 03301CE0 ANDS R3,R12,R3
\ 000000D8 B830C0E1 STRH R3,[R0, #+0x8]
\ 000000DC 2A0000EA B ??GPIO_Config_1
31 break;
32 case GPIO_OUT_OD:
33 GPIOx->PC0&=~Port_Pins;
\ ??GPIO_Config_6:
\ 000000E0 B030D0E1 LDRH R3,[R0, #+0]
\ 000000E4 01C0E0E1 MVN R12,R1
\ 000000E8 03301CE0 ANDS R3,R12,R3
\ 000000EC B030C0E1 STRH R3,[R0, #+0]
34 GPIOx->PC1&=~Port_Pins;
\ 000000F0 B430D0E1 LDRH R3,[R0, #+0x4]
\ 000000F4 01C0E0E1 MVN R12,R1
\ 000000F8 03301CE0 ANDS R3,R12,R3
\ 000000FC B430C0E1 STRH R3,[R0, #+0x4]
35 GPIOx->PC2|=Port_Pins;
\ 00000100 B830D0E1 LDRH R3,[R0, #+0x8]
\ 00000104 033091E1 ORRS R3,R1,R3
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