📄 fr_div.csf.rpt
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+-----------------------------------------------------------------------------+
| Hierarchy |
+-----------------------------------------------------------------------------+
Hierarchy
fr_div
lpm_counter:fv_rtl_0
alt_synch_counter:wysi_counter
+-----------------------------------------------------------------------------+
| Logic Options |
+-----------------------------------------------------------------------------+
+------------------------------------------------------------------------------------+-------+
| Name | Value |
+------------------------------------------------------------------------------------+-------+
| Optimization Technique -- APEX 20K/APEX 20KE/APEX 20KC/APEX II/ARM-based Excalibur | Speed |
| Power-Up Don't Care | On |
+------------------------------------------------------------------------------------+-------+
+-----------------------------------------------------------------------------+
| Resource Utilization by Entity |
+-----------------------------------------------------------------------------+
+----------------------------------------+-------------+-----------+-------------+------+--------------+--------------+-------------------+------------------+-------------------------------------------------------------+
| Compilation Hierarchy Node | Logic Cells | Registers | Memory Bits | Pins | Virtual Pins | LUT-Only LCs | Register-Only LCs | LUT/Register LCs | Full Hierarchy Name |
+----------------------------------------+-------------+-----------+-------------+------+--------------+--------------+-------------------+------------------+-------------------------------------------------------------+
| |fr_div | 5 (2) | 4 | 0 | 2 | 0 | 1 (1) | 1 (1) | 3 (0) | |fr_div |
| |lpm_counter:fv_rtl_0| | 3 (0) | 3 | 0 | 0 | 0 | 0 (0) | 0 (0) | 3 (0) | |fr_div|lpm_counter:fv_rtl_0 |
| |alt_synch_counter:wysi_counter| | 3 (3) | 3 | 0 | 0 | 0 | 0 (0) | 0 (0) | 3 (3) | |fr_div|lpm_counter:fv_rtl_0|alt_synch_counter:wysi_counter |
+----------------------------------------+-------------+-----------+-------------+------+--------------+--------------+-------------------+------------------+-------------------------------------------------------------+
+-----------------------------------------------------------------------------+
| Device Options |
+-----------------------------------------------------------------------------+
+------------------------------------------------------------------+--------------------------+
| Option | Setting |
+------------------------------------------------------------------+--------------------------+
| Auto-restart configuration after error | Off |
| Release clears before tri-states | Off |
| Enable user-supplied start-up clock (CLKUSR) | Off |
| Enable device-wide reset (DEV_CLRn) | Off |
| Enable device-wide output enable (DEV_OE) | Off |
| Enable INIT_DONE output | Off |
| Auto-increment JTAG user code for multiple configuration devices | On |
| Disable CONF_DONE and nSTATUS pull-ups on configuration device | Off |
| Generate compressed bitstreams | Off |
| Generate Tabular Text File (.ttf) | Off |
| Generate Raw Binary File (.rbf) | Off |
| Generate Hexadecimal Output File (.hexout) | Off |
| Configuration scheme | Passive Serial |
| Hexadecimal Output File count direction | Up |
| Hexadecimal Output File start address | 0 |
| Reserve all unused pins | As output driving ground |
| Configuration device | EPC2 |
| Base pin-out file on sameframe device | Off |
| Auto user code | Off |
| Configuration device auto user code | Off |
| JTAG user code for target device | 0XFFFFFFFF |
| JTAG user code for configuration device | 0XFFFFFFFF |
+------------------------------------------------------------------+--------------------------+
+-----------------------------------------------------------------------------+
| Floorplan View |
+-----------------------------------------------------------------------------+
Floorplan report data cannot be output to ASCII.
Please use Quartus II to view the floorplan report data.
+-----------------------------------------------------------------------------+
| Input Pins |
+-----------------------------------------------------------------------------+
+------+-------+-------------+--------------+------+---------+--------+--------------+-------------------------+---------------+-----------------+---------------+----------------------+--------------+
| Name | Pin # | MegaLAB Row | MegaLAB Col. | Col. | Fan-Out | Global | I/O Register | Use Local Routing Input | Power Up High | PCI I/O Enabled | Single-Pin CE | FastRow Interconnect | I/O Standard |
+------+-------+-------------+--------------+------+---------+--------+--------------+-------------------------+---------------+-----------------+---------------+----------------------+--------------+
| Fin | 25 | D | -- | -- | 1 | no | no | no | no | no | no | no | LVTTL |
+------+-------+-------------+--------------+------+---------+--------+--------------+-------------------------+---------------+-----------------+---------------+----------------------+--------------+
+-----------------------------------------------------------------------------+
| Output Pins |
+-----------------------------------------------------------------------------+
+------+-------+-------------+--------------+------+--------------+--------------------------+---------------+----------------+-----------------+---------------+---------------+------------+--------------+
| Name | Pin # | MegaLAB Row | MegaLAB Col. | Col. | I/O Register | Use Local Routing Output | Power Up High | Slow Slew Rate | PCI I/O Enabled | Single-Pin OE | Single-Pin CE | Open Drain | I/O Standard |
+------+-------+-------------+--------------+------+--------------+--------------------------+---------------+----------------+-----------------+---------------+---------------+------------+--------------+
| Fout | 6 | A | -- | -- | no | yes | no | no | no | no | no | no | LVTTL |
+------+-------+-------------+--------------+------+--------------+--------------------------+---------------+----------------+-----------------+---------------+---------------+------------+--------------+
+-----------------------------------------------------------------------------+
| All Package Pins |
+-----------------------------------------------------------------------------+
+-------+------------+--------------+
| Pin # | Usage | I/O Standard |
+-------+------------+--------------+
| 1 | VCC_INT | |
| 2 | GND* | |
| 3 | GND* | |
| 4 | GND | |
| 5 | VCC_IO | |
| 6 | Fout | LVTTL |
| 7 | GND* | |
| 8 | GND* | |
| 9 | GND* | |
| 10 | GND* | |
| 11 | GND* | |
| 12 | GND_IO | |
| 13 | GND* | |
| 14 | GND* | |
| 15 | GND* | |
| 16 | VCC_INT | |
| 17 | GND | |
| 18 | ^MSEL0 | |
| 19 | ^MSEL1 | |
| 20 | GND+ | |
| 21 | VCC_INT | |
| 22 | ^NCONFIG | |
| 23 | GND+ | |
| 24 | GND* | |
| 25 | Fin | LVTTL |
| 26 | GND* | |
| 27 | GND* | |
| 28 | VCC_IO | |
| 29 | GND* | |
| 30 | GND* | |
| 31 | GND* | |
| 32 | GND* | |
| 33 | GND* | |
| 34 | GND | |
| 35 | GND* | |
| 36 | VCC_INT | |
| 37 | GND* | |
| 38 | GND* | |
| 39 | GND* | |
| 40 | GND* | |
| 41 | GND* | |
| 42 | GND_IO | |
| 43 | GND* | |
| 44 | GND* | |
| 45 | VCC_IO | |
| 46 | GND* | |
| 47 | GND* | |
| 48 | GND* | |
| 49 | GND* | |
| 50 | GND* | |
| 51 | #TMS | |
| 52 | #TCK | |
| 53 | GND+ | |
| 54 | GND | |
| 55 | VCC_INT | |
| 56 | GND+ | |
| 57 | ^NSTATUS | |
| 58 | ^CONF_DONE | |
| 59 | GND* | |
| 60 | GND* | |
| 61 | VCC_IO | |
| 62 | GND* | |
| 63 | GND* | |
| 64 | GND* | |
| 65 | GND* | |
| 66 | GND* | |
| 67 | GND* | |
| 68 | GND* | |
| 69 | GND* | |
| 70 | GND* | |
| 71 | GND* | |
| 72 | GND_IO | |
| 73 | VCC_INT | |
| 74 | GND | |
| 75 | GND* | |
| 76 | GND* | |
| 77 | GND | |
| 78 | GND* | |
| 79 | GND* | |
| 80 | GND* | |
| 81 | GND* | |
| 82 | GND_CKOUT2 | |
| 83 | VCC_CKOUT2 | |
| 84 | GND* | |
| 85 | VCC_CKLK2 | |
| 86 | VCC_INT | |
| 87 | GND | |
| 88 | GND_CKLK2 | |
| 89 | VCC_IO | |
| 90 | #TDI | |
| 91 | ^nCE | |
| 92 | GND+ | |
| 93 | ^DCLK | |
| 94 | ^DATA0 | |
| 95 | GND+ | |
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