_primary.vhd

来自「the verilog code used to design a PIC uC」· VHDL 代码 · 共 12 行

library verilog;
use verilog.vl_types.all;
entity Progmemrom is
    generic(
        size            : integer := 1024
    );
    port(
        addr            : in     vl_logic_vector(12 downto 0);
        dout            : out    vl_logic_vector(13 downto 0)
    );
end Progmemrom;