count10stp1.stp

来自「基于Quartus II的十进制加法计数器的项目设计」· STP 代码 · 共 90 行

<session sof_file="" top_level_entity="count10">
  <display_tree gui_logging_enabled="0">
    <display_branch instance="count10" signal_set="USE_GLOBAL_TEMP" trigger="USE_GLOBAL_TEMP"/>
  </display_tree>
  <global_info>
    <multi attribute="window position" size="9" value="1353,574,398,124,356,50,67,0,50"/>
    <single attribute="active instance" value="0"/>
    <single attribute="lock mode" value="36110"/>
  </global_info>
  <instance compilation_mode="full" entity_name="sld_signaltap" is_auto_node="yes" name="count10" source_file="sld_signaltap.vhd">
    <node_ip_info instance_id="0" mfg_id="110" node_id="0" version="6"/>
    <position_info>
      <single attribute="active tab" value="1"/>
    </position_info>
    <signal_set global_temp="1" name="signal_set: 2009/04/16 16:13:25  #0">
      <clock name="CLK" polarity="posedge" tap_mode="probeonly"/>
      <config ram_type="M4K" reserved_data_nodes="0" reserved_trigger_nodes="0" sample_depth="1024" trigger_in_enable="yes" trigger_in_node="EN" trigger_in_tap_mode="classic" trigger_out_enable="no" trigger_out_pin="auto_stp_trigger_out_0"/>
      <top_entity/>
      <signal_vec>
        <trigger_input_vec>
          <wire name="COUT" tap_mode="classic" type="output pin"/>
          <wire name="CQI[0]" tap_mode="classic" type="register"/>
          <wire name="CQI[1]" tap_mode="classic" type="register"/>
          <wire name="CQI[2]" tap_mode="classic" type="register"/>
          <wire name="CQI[3]" tap_mode="classic" type="register"/>
          <wire name="CQ[0]" tap_mode="classic" type="output pin"/>
          <wire name="CQ[1]" tap_mode="classic" type="output pin"/>
          <wire name="CQ[2]" tap_mode="classic" type="output pin"/>
          <wire name="CQ[3]" tap_mode="classic" type="output pin"/>
        </trigger_input_vec>
        <data_input_vec>
          <wire name="COUT" tap_mode="classic" type="output pin"/>
          <wire name="CQI[0]" tap_mode="classic" type="register"/>
          <wire name="CQI[1]" tap_mode="classic" type="register"/>
          <wire name="CQI[2]" tap_mode="classic" type="register"/>
          <wire name="CQI[3]" tap_mode="classic" type="register"/>
          <wire name="CQ[0]" tap_mode="classic" type="output pin"/>
          <wire name="CQ[1]" tap_mode="classic" type="output pin"/>
          <wire name="CQ[2]" tap_mode="classic" type="output pin"/>
          <wire name="CQ[3]" tap_mode="classic" type="output pin"/>
        </data_input_vec>
      </signal_vec>
      <presentation>
        <data_view>
          <bus is_signal_inverted="no" link="all" name="CQI" order="lsb_to_msb" radix="hex" state="collapse" type="register">
            <net is_signal_inverted="no" name="CQI[0]"/>
            <net is_signal_inverted="no" name="CQI[1]"/>
            <net is_signal_inverted="no" name="CQI[2]"/>
            <net is_signal_inverted="no" name="CQI[3]"/>
          </bus>
          <bus is_signal_inverted="no" link="all" name="CQ" order="lsb_to_msb" radix="hex" state="collapse" type="output pin">
            <net is_signal_inverted="no" name="CQ[0]"/>
            <net is_signal_inverted="no" name="CQ[1]"/>
            <net is_signal_inverted="no" name="CQ[2]"/>
            <net is_signal_inverted="no" name="CQ[3]"/>
          </bus>
          <net is_signal_inverted="no" name="COUT"/>
        </data_view>
        <setup_view>
          <bus is_signal_inverted="no" link="all" name="CQI" order="lsb_to_msb" radix="hex" state="collapse" type="register">
            <net is_signal_inverted="no" name="CQI[0]"/>
            <net is_signal_inverted="no" name="CQI[1]"/>
            <net is_signal_inverted="no" name="CQI[2]"/>
            <net is_signal_inverted="no" name="CQI[3]"/>
          </bus>
          <bus is_signal_inverted="no" link="all" name="CQ" order="lsb_to_msb" radix="hex" state="collapse" type="output pin">
            <net is_signal_inverted="no" name="CQ[0]"/>
            <net is_signal_inverted="no" name="CQ[1]"/>
            <net is_signal_inverted="no" name="CQ[2]"/>
            <net is_signal_inverted="no" name="CQ[3]"/>
          </bus>
          <net is_signal_inverted="no" name="COUT"/>
        </setup_view>
      </presentation>
      <trigger CRC="3E42C049" global_temp="1" name="trigger: 2009/04/16 16:13:25  #1" position="pre" power_up_trigger_mode="false" segment_size="1" trigger_in="rising edge" trigger_out="active high" trigger_type="circular">
        <power_up_trigger position="pre" trigger_in="dont_care" trigger_out="active high"/>
        <events use_custom_flow_control="no">
          <level enabled="yes" name="condition1" type="basic">
            <power_up enabled="yes">
            </power_up>
            <op_node/>
          </level>
        </events>
      </trigger>
    </signal_set>
  </instance>
  <mnemonics/>
  <static_plugin_mnemonics/>
</session>