prev_cmp_uart.qmsg

Verilog编写的UART程序源代码。测试成功。支持字符串发送

{ "Info" "IVRFX_L2_VDB_LATCH_INFERRED" "uart_ctrl.000 speed_select.v(31) " "Info (10041): Inferred latch for \"uart_ctrl.000\" at speed_select.v(31)" {  } { { "speed_select.v" "" { Text "D:/mydesign/uart/speed_select.v" 31 0 0 } }  } 0 10041 "Inferred latch for \"%1!s!\" at %2!s!" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "my_uart_rx my_uart_rx:my_uart_rx " "Info: Elaborating entity \"my_uart_rx\" for hierarchy \"my_uart_rx:my_uart_rx\"" {  } { { "my_uart_top.v" "my_uart_rx" { Text "D:/mydesign/uart/my_uart_top.v" 30 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "my_uart_tx my_uart_tx:my_uart_tx " "Info: Elaborating entity \"my_uart_tx\" for hierarchy \"my_uart_tx:my_uart_tx\"" {  } { { "my_uart_top.v" "my_uart_tx" { Text "D:/mydesign/uart/my_uart_top.v" 41 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0 0}
{ "Info" "ISGN_QIC_SYNTHESIS_TOP_ONE" "" "Info: 1 design partition requires synthesis" { { "Info" "ISGN_QIC_SYNTHESIS_REASON_FILE_CHANGE" "Top " "Info: Partition \"Top\" requires synthesis because there were changes to its dependent source files" {  } {  } 0 0 "Partition \"%1!s!\" requires synthesis because there were changes to its dependent source files" 0 0 "" 0 0}  } {  } 0 0 "1 design partition requires synthesis" 0 0 "" 0 0}
{ "Info" "ISGN_QIC_NO_SYNTHESIS_TOP_ZERO" "" "Info: 0 design partitions will skip synthesis in the current incremental compilation" {  } {  } 0 0 "0 design partitions will skip synthesis in the current incremental compilation" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/altsyncram_g1p3.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/altsyncram_g1p3.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altsyncram_g1p3 " "Info: Found entity 1: altsyncram_g1p3" {  } { { "db/altsyncram_g1p3.tdf" "" { Text "D:/mydesign/uart/db/altsyncram_g1p3.tdf" 27 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/mux_aoc.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/mux_aoc.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 mux_aoc " "Info: Found entity 1: mux_aoc" {  } { { "db/mux_aoc.tdf" "" { Text "D:/mydesign/uart/db/mux_aoc.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/decode_rqf.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/decode_rqf.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 decode_rqf " "Info: Found entity 1: decode_rqf" {  } { { "db/decode_rqf.tdf" "" { Text "D:/mydesign/uart/db/decode_rqf.tdf" 22 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_7ai.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_7ai.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_7ai " "Info: Found entity 1: cntr_7ai" {  } { { "db/cntr_7ai.tdf" "" { Text "D:/mydesign/uart/db/cntr_7ai.tdf" 28 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_02j.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_02j.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_02j " "Info: Found entity 1: cntr_02j" {  } { { "db/cntr_02j.tdf" "" { Text "D:/mydesign/uart/db/cntr_02j.tdf" 28 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_sbi.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_sbi.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_sbi " "Info: Found entity 1: cntr_sbi" {  } { { "db/cntr_sbi.tdf" "" { Text "D:/mydesign/uart/db/cntr_sbi.tdf" 28 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "db/cntr_gui.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file db/cntr_gui.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 cntr_gui " "Info: Found entity 1: cntr_gui" {  } { { "db/cntr_gui.tdf" "" { Text "D:/mydesign/uart/db/cntr_gui.tdf" 28 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0 0}  } {  } 0 0 "Found %2!llu! design units, including %3!llu! entities, in source file %1!s!" 0 0 "" 0 0}
{ "Info" "ISGN_AE_SUCCESSFUL" "auto_signaltap_0 " "Info: Analysis and Synthesis generated SignalTap II or debug node instance \"auto_signaltap_0\"" {  } {  } 0 0 "Analysis and Synthesis generated SignalTap II or debug node instance \"%1!s!\"" 0 0 "" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG_PWRUP_DC" "my_uart_tx:my_uart_tx\|bps_start_r data_in VCC " "Warning (14131): Reduced register \"my_uart_tx:my_uart_tx\|bps_start_r\" with stuck data_in port to stuck value VCC -- power-up level has changed" {  } { { "my_uart_tx.v" "" { Text "D:/mydesign/uart/my_uart_tx.v" 50 -1 0 } }  } 0 14131 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s! -- power-up level has changed" 0 0 "" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG_PWRUP_DC" "my_uart_rx:my_uart_rx\|bps_start_r data_in VCC " "Warning (14131): Reduced register \"my_uart_rx:my_uart_rx\|bps_start_r\" with stuck data_in port to stuck value VCC -- power-up level has changed" {  } { { "my_uart_rx.v" "" { Text "D:/mydesign/uart/my_uart_rx.v" 42 -1 0 } }  } 0 14131 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s! -- power-up level has changed" 0 0 "" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG_PWRUP_DC" "speed_select:speed_select\|bps_para\[12\] data_in VCC " "Warning (14131): Reduced register \"speed_select:speed_select\|bps_para\[12\]\" with stuck data_in port to stuck value VCC -- power-up level has changed" {  } { { "speed_select.v" "" { Text "D:/mydesign/uart/speed_select.v" 63 -1 0 } }  } 0 14131 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s! -- power-up level has changed" 0 0 "" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "speed_select:speed_select\|bps_para\[11\] data_in GND " "Warning (14130): Reduced register \"speed_select:speed_select\|bps_para\[11\]\" with stuck data_in port to stuck value GND" {  } { { "speed_select.v" "" { Text "D:/mydesign/uart/speed_select.v" 63 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG_PWRUP_DC" "speed_select:speed_select\|bps_para\[10\] data_in VCC " "Warning (14131): Reduced register \"speed_select:speed_select\|bps_para\[10\]\" with stuck data_in port to stuck value VCC -- power-up level has changed" {  } { { "speed_select.v" "" { Text "D:/mydesign/uart/speed_select.v" 63 -1 0 } }  } 0 14131 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s! -- power-up level has changed" 0 0 "" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "speed_select:speed_select\|bps_para\[9\] data_in GND " "Warning (14130): Reduced register \"speed_select:speed_select\|bps_para\[9\]\" with stuck data_in port to stuck value GND" {  } { { "speed_select.v" "" { Text "D:/mydesign/uart/speed_select.v" 63 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "speed_select:speed_select\|bps_para\[8\] data_in GND " "Warning (14130): Reduced register \"speed_select:speed_select\|bps_para\[8\]\" with stuck data_in port to stuck value GND" {  } { { "speed_select.v" "" { Text "D:/mydesign/uart/speed_select.v" 63 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "speed_select:speed_select\|bps_para\[7\] data_in GND " "Warning (14130): Reduced register \"speed_select:speed_select\|bps_para\[7\]\" with stuck data_in port to stuck value GND" {  } { { "speed_select.v" "" { Text "D:/mydesign/uart/speed_select.v" 63 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG_PWRUP_DC" "speed_select:speed_select\|bps_para\[6\] data_in VCC " "Warning (14131): Reduced register \"speed_select:speed_select\|bps_para\[6\]\" with stuck data_in port to stuck value VCC -- power-up level has changed" {  } { { "speed_select.v" "" { Text "D:/mydesign/uart/speed_select.v" 63 -1 0 } }  } 0 14131 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s! -- power-up level has changed" 0 0 "" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "speed_select:speed_select\|bps_para\[5\] data_in GND " "Warning (14130): Reduced register \"speed_select:speed_select\|bps_para\[5\]\" with stuck data_in port to stuck value GND" {  } { { "speed_select.v" "" { Text "D:/mydesign/uart/speed_select.v" 63 -1 0 } }  } 0 14130 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0 "" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG_PWRUP_DC" "speed_select:speed_select\|bps_para\[4\] data_in VCC " "Warning (14131): Reduced register \"speed_select:speed_select\|bps_para\[4\]\" with stuck data_in port to stuck value VCC -- power-up level has changed" {  } { { "speed_select.v" "" { Text "D:/mydesign/uart/speed_select.v" 63 -1 0 } }  } 0 14131 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s! -- power-up level has changed" 0 0 "" 0 0}