prev_cmp_uart.merge.qmsg

Verilog编写的UART程序源代码。测试成功。支持字符串发送

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Partition Merge Quartus II " "Info: Running Quartus II Partition Merge" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 8.0 Build 215 05/29/2008 SJ Web Edition " "Info: Version 8.0 Build 215 05/29/2008 SJ Web Edition" {  } {  } 0 0 "%1!s!" 0 0 "" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Apr 05 21:28:52 2009 " "Info: Processing started: Sun Apr 05 21:28:52 2009" {  } {  } 0 0 "Processing started: %1!s!" 0 0 "" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0 "" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_cdb --read_settings_files=off --write_settings_files=off uart -c uart --merge=on " "Info: Command: quartus_cdb --read_settings_files=off --write_settings_files=off uart -c uart --merge=on" {  } {  } 0 0 "Command: %1!s!" 0 0 "" 0 0}
{ "Warning" "WAMERGE_PARTITION_SOURCE_OVERRIDE_POST_FIT" "Top " "Warning: Previously generated Fitter netlist for partition \"Top\" is older than current Synthesis netlist -- using the current Synthesis netlist instead to ensure that your latest source changes are included" { { "Info" "IAMERGE_PARTITION_SOURCE_OVERRIDE_POST_FIT_HELP" "" "Info: You can force the Quartus II software to use the previously generated Fitter netlist by setting the Netlist Type for this partition to \"Post-Fit (Strict)\"" {  } {  } 0 0 "You can force the Quartus II software to use the previously generated Fitter netlist by setting the Netlist Type for this partition to \"Post-Fit (Strict)\"" 0 0 "" 0 0}  } {  } 0 0 "Previously generated Fitter netlist for partition \"%1!s!\" is older than current Synthesis netlist -- using the current Synthesis netlist instead to ensure that your latest source changes are included" 0 0 "" 0 0}
{ "Info" "IAMERGE_PARTITION_SOURCE_SOURCE" "Top " "Info: Using synthesis netlist for partition \"Top\"" {  } {  } 0 0 "Using synthesis netlist for partition \"%1!s!\"" 0 0 "" 0 0}
{ "Info" "IAMERGE_PARTITION_SOURCE_SOURCE" "sld_signaltap:auto_signaltap_0 " "Info: Using synthesis netlist for partition \"sld_signaltap:auto_signaltap_0\"" {  } {  } 0 0 "Using synthesis netlist for partition \"%1!s!\"" 0 0 "" 0 0}
{ "Info" "IAMERGE_PARTITION_SOURCE_SOURCE" "sld_hub:sld_hub_inst " "Info: Using synthesis netlist for partition \"sld_hub:sld_hub_inst\"" {  } {  } 0 0 "Using synthesis netlist for partition \"%1!s!\"" 0 0 "" 0 0}
{ "Info" "IAMERGE_ATOM_BLACKBOX_RESOLVED" "3 " "Info: Resolved and merged 3 partition(s)" {  } {  } 0 0 "Resolved and merged %1!d! partition(s)" 0 0 "" 0 0}
{ "Info" "ICUT_CUT_TM_SUMMARY" "547 " "Info: Implemented 547 device resources after synthesis - the final resource count might be different" { { "Info" "ICUT_CUT_TM_IPINS" "6 " "Info: Implemented 6 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_OPINS" "2 " "Info: Implemented 2 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_LCELLS" "535 " "Info: Implemented 535 logic cells" {  } {  } 0 0 "Implemented %1!d! logic cells" 0 0 "" 0 0} { "Info" "ICUT_CUT_TM_RAMS" "3 " "Info: Implemented 3 RAM segments" {  } {  } 0 0 "Implemented %1!d! RAM segments" 0 0 "" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0 "" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Partition Merge 0 s 1  Quartus II " "Info: Quartus II Partition Merge was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_PEAK_VSIZE_MEMORY" "171 " "Info: Peak virtual memory: 171 megabytes" {  } {  } 0 0 "Peak virtual memory: %1!s! megabytes" 0 0 "" 0 0} { "Info" "IQEXE_END_BANNER_TIME" "Sun Apr 05 21:28:59 2009 " "Info: Processing ended: Sun Apr 05 21:28:59 2009" {  } {  } 0 0 "Processing ended: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:07 " "Info: Elapsed time: 00:00:07" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0 "" 0 0} { "Info" "IQEXE_ELAPSED_CPU_TIME" "00:00:02 " "Info: Total CPU time (on all processors): 00:00:02" {  } {  } 0 0 "Total CPU time (on all processors): %1!s!" 0 0 "" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0 "" 0 0}