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📄 uart.map.rpt

📁 Verilog编写的UART程序源代码。测试成功。支持字符串发送
💻 RPT
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; Remove Redundant Logic Cells                                 ; Off                ; Off                ;
; Remove Duplicate Registers                                   ; On                 ; On                 ;
; Ignore CARRY Buffers                                         ; Off                ; Off                ;
; Ignore CASCADE Buffers                                       ; Off                ; Off                ;
; Ignore GLOBAL Buffers                                        ; Off                ; Off                ;
; Ignore ROW GLOBAL Buffers                                    ; Off                ; Off                ;
; Ignore LCELL Buffers                                         ; Off                ; Off                ;
; Ignore SOFT Buffers                                          ; On                 ; On                 ;
; Limit AHDL Integers to 32 Bits                               ; Off                ; Off                ;
; Optimization Technique                                       ; Balanced           ; Balanced           ;
; Carry Chain Length                                           ; 70                 ; 70                 ;
; Auto Carry Chains                                            ; On                 ; On                 ;
; Auto Open-Drain Pins                                         ; On                 ; On                 ;
; Perform WYSIWYG Primitive Resynthesis                        ; Off                ; Off                ;
; Perform gate-level register retiming                         ; Off                ; Off                ;
; Allow register retiming to trade off Tsu/Tco with Fmax       ; On                 ; On                 ;
; Auto ROM Replacement                                         ; On                 ; On                 ;
; Auto RAM Replacement                                         ; On                 ; On                 ;
; Auto Shift Register Replacement                              ; Auto               ; Auto               ;
; Auto Clock Enable Replacement                                ; On                 ; On                 ;
; Strict RAM Replacement                                       ; Off                ; Off                ;
; Allow Synchronous Control Signals                            ; On                 ; On                 ;
; Force Use of Synchronous Clear Signals                       ; Off                ; Off                ;
; Auto RAM to Logic Cell Conversion                            ; Off                ; Off                ;
; Auto Resource Sharing                                        ; Off                ; Off                ;
; Allow Any RAM Size For Recognition                           ; Off                ; Off                ;
; Allow Any ROM Size For Recognition                           ; Off                ; Off                ;
; Allow Any Shift Register Size For Recognition                ; Off                ; Off                ;
; Ignore translate_off and synthesis_off directives            ; Off                ; Off                ;
; Show Parameter Settings Tables in Synthesis Report           ; On                 ; On                 ;
; Ignore Maximum Fan-Out Assignments                           ; Off                ; Off                ;
; Synchronization Register Chain Length                        ; 2                  ; 2                  ;
; PowerPlay Power Optimization                                 ; Normal compilation ; Normal compilation ;
; HDL message level                                            ; Level2             ; Level2             ;
; Suppress Register Optimization Related Messages              ; Off                ; Off                ;
; Number of Removed Registers Reported in Synthesis Report     ; 100                ; 100                ;
; Number of Inverted Registers Reported in Synthesis Report    ; 100                ; 100                ;
; Clock MUX Protection                                         ; On                 ; On                 ;
; Block Design Naming                                          ; Auto               ; Auto               ;
; SDC constraint protection                                    ; Off                ; Off                ;
; Synthesis Effort                                             ; Auto               ; Auto               ;
; Shift Register Replacement - Allow Asynchronous Clear Signal ; On                 ; On                 ;
+--------------------------------------------------------------+--------------------+--------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read                                                                                                                        ;
+----------------------------------+-----------------+------------------------------+---------------------------------------------------------------------------+
; File Name with User-Entered Path ; Used in Netlist ; File Type                    ; File Name with Absolute Path                                              ;
+----------------------------------+-----------------+------------------------------+---------------------------------------------------------------------------+
; speed_select.v                   ; yes             ; User Verilog HDL File        ; D:/mydesign/uart/speed_select.v                                           ;
; my_uart_rx.v                     ; yes             ; User Verilog HDL File        ; D:/mydesign/uart/my_uart_rx.v                                             ;
; my_uart_tx.v                     ; yes             ; User Verilog HDL File        ; D:/mydesign/uart/my_uart_tx.v                                             ;
; my_uart_top.v                    ; yes             ; User Verilog HDL File        ; D:/mydesign/uart/my_uart_top.v                                            ;
; sld_signaltap.vhd                ; yes             ; Encrypted Megafunction       ; d:/altera/80/quartus/libraries/megafunctions/sld_signaltap.vhd            ;
; sld_ela_control.vhd              ; yes             ; Encrypted Megafunction       ; d:/altera/80/quartus/libraries/megafunctions/sld_ela_control.vhd          ;
; LPM_SHIFTREG.tdf                 ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/LPM_SHIFTREG.tdf             ;
; lpm_constant.inc                 ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/lpm_constant.inc             ;
; dffeea.inc                       ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/dffeea.inc                   ;
; aglobal80.inc                    ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/aglobal80.inc                ;
; sld_mbpmg.vhd                    ; yes             ; Encrypted Megafunction       ; d:/altera/80/quartus/libraries/megafunctions/sld_mbpmg.vhd                ;
; sld_ela_trigger_flow_mgr.vhd     ; yes             ; Encrypted Megafunction       ; d:/altera/80/quartus/libraries/megafunctions/sld_ela_trigger_flow_mgr.vhd ;
; sld_buffer_manager.vhd           ; yes             ; Encrypted Megafunction       ; d:/altera/80/quartus/libraries/megafunctions/sld_buffer_manager.vhd       ;
; altsyncram.tdf                   ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/altsyncram.tdf               ;
; stratix_ram_block.inc            ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/stratix_ram_block.inc        ;
; lpm_mux.inc                      ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/lpm_mux.inc                  ;
; lpm_decode.inc                   ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/lpm_decode.inc               ;
; a_rdenreg.inc                    ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/a_rdenreg.inc                ;
; altrom.inc                       ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/altrom.inc                   ;
; altram.inc                       ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/altram.inc                   ;
; altdpram.inc                     ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/altdpram.inc                 ;
; altqpram.inc                     ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/altqpram.inc                 ;
; db/altsyncram_g1p3.tdf           ; yes             ; Auto-Generated Megafunction  ; D:/mydesign/uart/db/altsyncram_g1p3.tdf                                   ;
; altdpram.tdf                     ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/altdpram.tdf                 ;
; memmodes.inc                     ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/others/maxplus2/memmodes.inc               ;
; a_hdffe.inc                      ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/a_hdffe.inc                  ;
; alt_le_rden_reg.inc              ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/alt_le_rden_reg.inc          ;
; altsyncram.inc                   ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/altsyncram.inc               ;
; lpm_mux.tdf                      ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/lpm_mux.tdf                  ;
; muxlut.inc                       ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/muxlut.inc                   ;
; bypassff.inc                     ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/bypassff.inc                 ;
; altshift.inc                     ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/altshift.inc                 ;
; db/mux_aoc.tdf                   ; yes             ; Auto-Generated Megafunction  ; D:/mydesign/uart/db/mux_aoc.tdf                                           ;
; lpm_decode.tdf                   ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/lpm_decode.tdf               ;
; declut.inc                       ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/declut.inc                   ;
; lpm_compare.inc                  ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/lpm_compare.inc              ;
; db/decode_rqf.tdf                ; yes             ; Auto-Generated Megafunction  ; D:/mydesign/uart/db/decode_rqf.tdf                                        ;
; LPM_COUNTER.tdf                  ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/LPM_COUNTER.tdf              ;
; lpm_add_sub.inc                  ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/lpm_add_sub.inc              ;
; cmpconst.inc                     ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/cmpconst.inc                 ;
; lpm_counter.inc                  ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/lpm_counter.inc              ;
; alt_synch_counter.inc            ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/alt_synch_counter.inc        ;
; alt_synch_counter_f.inc          ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/alt_synch_counter_f.inc      ;
; alt_counter_f10ke.inc            ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/alt_counter_f10ke.inc        ;
; alt_counter_stratix.inc          ; yes             ; Megafunction                 ; d:/altera/80/quartus/libraries/megafunctions/alt_counter_stratix.inc      ;
; db/cntr_7ai.tdf                  ; yes             ; Auto-Generated Megafunction  ; D:/mydesign/uart/db/cntr_7ai.tdf                                          ;
; db/cntr_02j.tdf                  ; yes             ; Auto-Generated Megafunction  ; D:/mydesign/uart/db/cntr_02j.tdf                                          ;
; db/cntr_sbi.tdf                  ; yes             ; Auto-Generated Megafunction  ; D:/mydesign/uart/db/cntr_sbi.tdf                                          ;
; db/cntr_gui.tdf                  ; yes             ; Auto-Generated Megafunction  ; D:/mydesign/uart/db/cntr_gui.tdf                                          ;
; sld_rom_sr.vhd                   ; yes             ; Encrypted Megafunction       ; d:/altera/80/quartus/libraries/megafunctions/sld_rom_sr.vhd               ;
; sld_hub.vhd                      ; yes             ; Encrypted Megafunction       ; d:/altera/80/quartus/libraries/megafunctions/sld_hub.vhd                  ;
; db/decode_aoi.tdf                ; yes             ; Auto-Generated Megafunction  ; D:/mydesign/uart/db/decode_aoi.tdf                                        ;
; sld_dffex.vhd                    ; yes             ; Encrypted Megafunction       ; d:/altera/80/quartus/libraries/megafunctions/sld_dffex.vhd                ;
+----------------------------------+-----------------+------------------------------+---------------------------------------------------------------------------+


+---------------------------------------------------------------------------------------------+
; Source assignments for sld_signaltap:auto_signaltap_0|sld_signaltap_impl:sld_signaltap_body ;
+---------------------------------+-------+------+--------------------------------------------+
; Assignment                      ; Value ; From ; To                                         ;

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