sram64.vhd

来自「随机存储器VHDL代码」· VHDL 代码 · 共 49 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity sram64 is
generic (k:integer:=8;
         w:integer:=3);
port (wr,rd,cs:in std_logic;
      adr:in std_logic_vector(w-1 downto 0);
      din:in std_logic_vector(k-1 downto 0);
      dout:out std_logic_vector(k-1 downto 0));
end sram64;
architecture behav of sram64 is
subtype word is std_logic_vector(k-1 downto 0);
type memory is array (0 to 2**w-1) of word;
signal adr_in:integer range 0 to 2**w-1;
signal sram: memory;
signal din_change,wr_rise:time:=0 ps;
begin 
adr_in<=conv_integer(adr);
process (wr)
begin 
if (wr'event and wr='1') then
if (cs='1' and wr='1') then 
  sram (adr_in)<=din after 2ns;
  end if;
 end if;
wr_rise<=now;
assert (now-din_change>=800 ps)
report "setup error din(sram)"
severity warning;
end process;
process (rd,cs)
begin 
if (rd='0' and cs='1') then
dout<=sram(adr_in) after 3 ns;
else 
dout<="00000000" after 4 ns;
end if;
end process;
process (din)
begin
din_change<=now;
assert (now-wr_rise>=300 ps)
report "hold error din (sram)"
severity warning;
end process;
end behav;