📄 jianbo.tan.qmsg
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{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "CLOCK " "Info: Assuming node \"CLOCK\" is an undefined clock" { } { { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 10 -1 0 } } { "c:/altera/72/quartus/bin/Assignment Editor.qase" "" { Assignment "c:/altera/72/quartus/bin/Assignment Editor.qase" 1 { { 0 "CLOCK" } } } } } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0 "" 0} } { } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0 "" 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "CLOCK register X2\[5\] register Y3\[17\] 226.96 MHz 4.406 ns Internal " "Info: Clock \"CLOCK\" has Internal fmax of 226.96 MHz between source register \"X2\[5\]\" and destination register \"Y3\[17\]\" (period= 4.406 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.201 ns + Longest register register " "Info: + Longest register to register delay is 4.201 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns X2\[5\] 1 REG LCFF_X15_Y15_N27 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X15_Y15_N27; Fanout = 3; REG Node = 'X2\[5\]'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { X2[5] } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.094 ns) + CELL(0.150 ns) 1.244 ns Add14~429 2 COMB LCCOMB_X16_Y14_N30 2 " "Info: 2: + IC(1.094 ns) + CELL(0.150 ns) = 1.244 ns; Loc. = LCCOMB_X16_Y14_N30; Fanout = 2; COMB Node = 'Add14~429'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.244 ns" { X2[5] Add14~429 } "NODE_NAME" } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.984 ns) + CELL(0.393 ns) 2.621 ns Y3\[3\]~193 3 COMB LCCOMB_X19_Y15_N22 2 " "Info: 3: + IC(0.984 ns) + CELL(0.393 ns) = 2.621 ns; Loc. = LCCOMB_X19_Y15_N22; Fanout = 2; COMB Node = 'Y3\[3\]~193'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.377 ns" { Add14~429 Y3[3]~193 } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 2.692 ns Y3\[4\]~195 4 COMB LCCOMB_X19_Y15_N24 2 " "Info: 4: + IC(0.000 ns) + CELL(0.071 ns) = 2.692 ns; Loc. = LCCOMB_X19_Y15_N24; Fanout = 2; COMB Node = 'Y3\[4\]~195'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Y3[3]~193 Y3[4]~195 } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 2.763 ns Y3\[5\]~197 5 COMB LCCOMB_X19_Y15_N26 2 " "Info: 5: + IC(0.000 ns) + CELL(0.071 ns) = 2.763 ns; Loc. = LCCOMB_X19_Y15_N26; Fanout = 2; COMB Node = 'Y3\[5\]~197'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Y3[4]~195 Y3[5]~197 } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 2.834 ns Y3\[6\]~199 6 COMB LCCOMB_X19_Y15_N28 2 " "Info: 6: + IC(0.000 ns) + CELL(0.071 ns) = 2.834 ns; Loc. = LCCOMB_X19_Y15_N28; Fanout = 2; COMB Node = 'Y3\[6\]~199'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Y3[5]~197 Y3[6]~199 } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.146 ns) 2.980 ns Y3\[7\]~201 7 COMB LCCOMB_X19_Y15_N30 2 " "Info: 7: + IC(0.000 ns) + CELL(0.146 ns) = 2.980 ns; Loc. = LCCOMB_X19_Y15_N30; Fanout = 2; COMB Node = 'Y3\[7\]~201'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.146 ns" { Y3[6]~199 Y3[7]~201 } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 3.051 ns Y3\[8\]~203 8 COMB LCCOMB_X19_Y14_N0 2 " "Info: 8: + IC(0.000 ns) + CELL(0.071 ns) = 3.051 ns; Loc. = LCCOMB_X19_Y14_N0; Fanout = 2; COMB Node = 'Y3\[8\]~203'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Y3[7]~201 Y3[8]~203 } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 3.122 ns Y3\[9\]~205 9 COMB LCCOMB_X19_Y14_N2 2 " "Info: 9: + IC(0.000 ns) + CELL(0.071 ns) = 3.122 ns; Loc. = LCCOMB_X19_Y14_N2; Fanout = 2; COMB Node = 'Y3\[9\]~205'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Y3[8]~203 Y3[9]~205 } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 3.193 ns Y3\[10\]~207 10 COMB LCCOMB_X19_Y14_N4 2 " "Info: 10: + IC(0.000 ns) + CELL(0.071 ns) = 3.193 ns; Loc. = LCCOMB_X19_Y14_N4; Fanout = 2; COMB Node = 'Y3\[10\]~207'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Y3[9]~205 Y3[10]~207 } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 3.264 ns Y3\[11\]~209 11 COMB LCCOMB_X19_Y14_N6 2 " "Info: 11: + IC(0.000 ns) + CELL(0.071 ns) = 3.264 ns; Loc. = LCCOMB_X19_Y14_N6; Fanout = 2; COMB Node = 'Y3\[11\]~209'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Y3[10]~207 Y3[11]~209 } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 3.335 ns Y3\[12\]~211 12 COMB LCCOMB_X19_Y14_N8 2 " "Info: 12: + IC(0.000 ns) + CELL(0.071 ns) = 3.335 ns; Loc. = LCCOMB_X19_Y14_N8; Fanout = 2; COMB Node = 'Y3\[12\]~211'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Y3[11]~209 Y3[12]~211 } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 3.406 ns Y3\[13\]~213 13 COMB LCCOMB_X19_Y14_N10 2 " "Info: 13: + IC(0.000 ns) + CELL(0.071 ns) = 3.406 ns; Loc. = LCCOMB_X19_Y14_N10; Fanout = 2; COMB Node = 'Y3\[13\]~213'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Y3[12]~211 Y3[13]~213 } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 3.477 ns Y3\[14\]~215 14 COMB LCCOMB_X19_Y14_N12 2 " "Info: 14: + IC(0.000 ns) + CELL(0.071 ns) = 3.477 ns; Loc. = LCCOMB_X19_Y14_N12; Fanout = 2; COMB Node = 'Y3\[14\]~215'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Y3[13]~213 Y3[14]~215 } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.159 ns) 3.636 ns Y3\[15\]~217 15 COMB LCCOMB_X19_Y14_N14 2 " "Info: 15: + IC(0.000 ns) + CELL(0.159 ns) = 3.636 ns; Loc. = LCCOMB_X19_Y14_N14; Fanout = 2; COMB Node = 'Y3\[15\]~217'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.159 ns" { Y3[14]~215 Y3[15]~217 } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 3.707 ns Y3\[16\]~219 16 COMB LCCOMB_X19_Y14_N16 1 " "Info: 16: + IC(0.000 ns) + CELL(0.071 ns) = 3.707 ns; Loc. = LCCOMB_X19_Y14_N16; Fanout = 1; COMB Node = 'Y3\[16\]~219'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Y3[15]~217 Y3[16]~219 } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.410 ns) 4.117 ns Y3\[17\]~220 17 COMB LCCOMB_X19_Y14_N18 1 " "Info: 17: + IC(0.000 ns) + CELL(0.410 ns) = 4.117 ns; Loc. = LCCOMB_X19_Y14_N18; Fanout = 1; COMB Node = 'Y3\[17\]~220'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.410 ns" { Y3[16]~219 Y3[17]~220 } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.084 ns) 4.201 ns Y3\[17\] 18 REG LCFF_X19_Y14_N19 61 " "Info: 18: + IC(0.000 ns) + CELL(0.084 ns) = 4.201 ns; Loc. = LCFF_X19_Y14_N19; Fanout = 61; REG Node = 'Y3\[17\]'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.084 ns" { Y3[17]~220 Y3[17] } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.123 ns ( 50.54 % ) " "Info: Total cell delay = 2.123 ns ( 50.54 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.078 ns ( 49.46 % ) " "Info: Total interconnect delay = 2.078 ns ( 49.46 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "4.201 ns" { X2[5] Add14~429 Y3[3]~193 Y3[4]~195 Y3[5]~197 Y3[6]~199 Y3[7]~201 Y3[8]~203 Y3[9]~205 Y3[10]~207 Y3[11]~209 Y3[12]~211 Y3[13]~213 Y3[14]~215 Y3[15]~217 Y3[16]~219 Y3[17]~220 Y3[17] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "4.201 ns" { X2[5] {} Add14~429 {} Y3[3]~193 {} Y3[4]~195 {} Y3[5]~197 {} Y3[6]~199 {} Y3[7]~201 {} Y3[8]~203 {} Y3[9]~205 {} Y3[10]~207 {} Y3[11]~209 {} Y3[12]~211 {} Y3[13]~213 {} Y3[14]~215 {} Y3[15]~217 {} Y3[16]~219 {} Y3[17]~220 {} Y3[17] {} } { 0.000ns 1.094ns 0.984ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.150ns 0.393ns 0.071ns 0.071ns 0.071ns 0.146ns 0.071ns 0.071ns 0.071ns 0.071ns 0.071ns 0.071ns 0.071ns 0.159ns 0.071ns 0.410ns 0.084ns } "" } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.009 ns - Smallest " "Info: - Smallest clock skew is 0.009 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK destination 2.636 ns + Shortest register " "Info: + Shortest clock path from clock \"CLOCK\" to destination register is 2.636 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.959 ns) 0.959 ns CLOCK 1 CLK PIN_J2 1 " "Info: 1: + IC(0.000 ns) + CELL(0.959 ns) = 0.959 ns; Loc. = PIN_J2; Fanout = 1; CLK Node = 'CLOCK'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 10 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.218 ns) + CELL(0.000 ns) 1.177 ns CLOCK~clkctrl 2 COMB CLKCTRL_G3 886 " "Info: 2: + IC(0.218 ns) + CELL(0.000 ns) = 1.177 ns; Loc. = CLKCTRL_G3; Fanout = 886; COMB Node = 'CLOCK~clkctrl'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.218 ns" { CLOCK CLOCK~clkctrl } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 10 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.922 ns) + CELL(0.537 ns) 2.636 ns Y3\[17\] 3 REG LCFF_X19_Y14_N19 61 " "Info: 3: + IC(0.922 ns) + CELL(0.537 ns) = 2.636 ns; Loc. = LCFF_X19_Y14_N19; Fanout = 61; REG Node = 'Y3\[17\]'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.459 ns" { CLOCK~clkctrl Y3[17] } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.496 ns ( 56.75 % ) " "Info: Total cell delay = 1.496 ns ( 56.75 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.140 ns ( 43.25 % ) " "Info: Total interconnect delay = 1.140 ns ( 43.25 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.636 ns" { CLOCK CLOCK~clkctrl Y3[17] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.636 ns" { CLOCK {} CLOCK~combout {} CLOCK~clkctrl {} Y3[17] {} } { 0.000ns 0.000ns 0.218ns 0.922ns } { 0.000ns 0.959ns 0.000ns 0.537ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK source 2.627 ns - Longest register " "Info: - Longest clock path from clock \"CLOCK\" to source register is 2.627 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.959 ns) 0.959 ns CLOCK 1 CLK PIN_J2 1 " "Info: 1: + IC(0.000 ns) + CELL(0.959 ns) = 0.959 ns; Loc. = PIN_J2; Fanout = 1; CLK Node = 'CLOCK'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 10 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.218 ns) + CELL(0.000 ns) 1.177 ns CLOCK~clkctrl 2 COMB CLKCTRL_G3 886 " "Info: 2: + IC(0.218 ns) + CELL(0.000 ns) = 1.177 ns; Loc. = CLKCTRL_G3; Fanout = 886; COMB Node = 'CLOCK~clkctrl'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.218 ns" { CLOCK CLOCK~clkctrl } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 10 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.913 ns) + CELL(0.537 ns) 2.627 ns X2\[5\] 3 REG LCFF_X15_Y15_N27 3 " "Info: 3: + IC(0.913 ns) + CELL(0.537 ns) = 2.627 ns; Loc. = LCFF_X15_Y15_N27; Fanout = 3; REG Node = 'X2\[5\]'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.450 ns" { CLOCK~clkctrl X2[5] } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.496 ns ( 56.95 % ) " "Info: Total cell delay = 1.496 ns ( 56.95 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.131 ns ( 43.05 % ) " "Info: Total interconnect delay = 1.131 ns ( 43.05 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.627 ns" { CLOCK CLOCK~clkctrl X2[5] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.627 ns" { CLOCK {} CLOCK~combout {} CLOCK~clkctrl {} X2[5] {} } { 0.000ns 0.000ns 0.218ns 0.913ns } { 0.000ns 0.959ns 0.000ns 0.537ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.636 ns" { CLOCK CLOCK~clkctrl Y3[17] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.636 ns" { CLOCK {} CLOCK~combout {} CLOCK~clkctrl {} Y3[17] {} } { 0.000ns 0.000ns 0.218ns 0.922ns } { 0.000ns 0.959ns 0.000ns 0.537ns } "" } } { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.627 ns" { CLOCK CLOCK~clkctrl X2[5] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.627 ns" { CLOCK {} CLOCK~combout {} CLOCK~clkctrl {} X2[5] {} } { 0.000ns 0.000ns 0.218ns 0.913ns } { 0.000ns 0.959ns 0.000ns 0.537ns } "" } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.250 ns + " "Info: + Micro clock to output delay of source is 0.250 ns" { } { { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.036 ns + " "Info: + Micro setup delay of destination is -0.036 ns" { } { { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "4.201 ns" { X2[5] Add14~429 Y3[3]~193 Y3[4]~195 Y3[5]~197 Y3[6]~199 Y3[7]~201 Y3[8]~203 Y3[9]~205 Y3[10]~207 Y3[11]~209 Y3[12]~211 Y3[13]~213 Y3[14]~215 Y3[15]~217 Y3[16]~219 Y3[17]~220 Y3[17] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "4.201 ns" { X2[5] {} Add14~429 {} Y3[3]~193 {} Y3[4]~195 {} Y3[5]~197 {} Y3[6]~199 {} Y3[7]~201 {} Y3[8]~203 {} Y3[9]~205 {} Y3[10]~207 {} Y3[11]~209 {} Y3[12]~211 {} Y3[13]~213 {} Y3[14]~215 {} Y3[15]~217 {} Y3[16]~219 {} Y3[17]~220 {} Y3[17] {} } { 0.000ns 1.094ns 0.984ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns } { 0.000ns 0.150ns 0.393ns 0.071ns 0.071ns 0.071ns 0.146ns 0.071ns 0.071ns 0.071ns 0.071ns 0.071ns 0.071ns 0.071ns 0.159ns 0.071ns 0.410ns 0.084ns } "" } } { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.636 ns" { CLOCK CLOCK~clkctrl Y3[17] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.636 ns" { CLOCK {} CLOCK~combout {} CLOCK~clkctrl {} Y3[17] {} } { 0.000ns 0.000ns 0.218ns 0.922ns } { 0.000ns 0.959ns 0.000ns 0.537ns } "" } } { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.627 ns" { CLOCK CLOCK~clkctrl X2[5] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.627 ns" { CLOCK {} CLOCK~combout {} CLOCK~clkctrl {} X2[5] {} } { 0.000ns 0.000ns 0.218ns 0.913ns } { 0.000ns 0.959ns 0.000ns 0.537ns } "" } } } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0 "" 0}
{ "Info" "ITDB_TSU_RESULT" "X0\[14\] CORDIC_Y\[3\] CLOCK 7.700 ns register " "Info: tsu for register \"X0\[14\]\" (data pin = \"CORDIC_Y\[3\]\", clock pin = \"CLOCK\") is 7.700 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "10.362 ns + Longest pin register " "Info: + Longest pin to register delay is 10.362 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.812 ns) 0.812 ns CORDIC_Y\[3\] 1 PIN PIN_G15 4 " "Info: 1: + IC(0.000 ns) + CELL(0.812 ns) = 0.812 ns; Loc. = PIN_G15; Fanout = 4; PIN Node = 'CORDIC_Y\[3\]'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { CORDIC_Y[3] } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 11 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(5.969 ns) + CELL(0.414 ns) 7.195 ns Add1~228 2 COMB LCCOMB_X18_Y10_N22 2 " "Info: 2: + IC(5.969 ns) + CELL(0.414 ns) = 7.195 ns; Loc. = LCCOMB_X18_Y10_N22; Fanout = 2; COMB Node = 'Add1~228'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "6.383 ns" { CORDIC_Y[3] Add1~228 } "NODE_NAME" } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 7.266 ns Add1~230 3 COMB LCCOMB_X18_Y10_N24 2 " "Info: 3: + IC(0.000 ns) + CELL(0.071 ns) = 7.266 ns; Loc. = LCCOMB_X18_Y10_N24; Fanout = 2; COMB Node = 'Add1~230'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Add1~228 Add1~230 } "NODE_NAME" } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 7.337 ns Add1~232 4 COMB LCCOMB_X18_Y10_N26 2 " "Info: 4: + IC(0.000 ns) + CELL(0.071 ns) = 7.337 ns; Loc. = LCCOMB_X18_Y10_N26; Fanout = 2; COMB Node = 'Add1~232'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Add1~230 Add1~232 } "NODE_NAME" } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 7.408 ns Add1~234 5 COMB LCCOMB_X18_Y10_N28 2 " "Info: 5: + IC(0.000 ns) + CELL(0.071 ns) = 7.408 ns; Loc. = LCCOMB_X18_Y10_N28; Fanout = 2; COMB Node = 'Add1~234'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Add1~232 Add1~234 } "NODE_NAME" } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.146 ns) 7.554 ns Add1~236 6 COMB LCCOMB_X18_Y10_N30 2 " "Info: 6: + IC(0.000 ns) + CELL(0.146 ns) = 7.554 ns; Loc. = LCCOMB_X18_Y10_N30; Fanout = 2; COMB Node = 'Add1~236'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.146 ns" { Add1~234 Add1~236 } "NODE_NAME" } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 7.625 ns Add1~238 7 COMB LCCOMB_X18_Y9_N0 2 " "Info: 7: + IC(0.000 ns) + CELL(0.071 ns) = 7.625 ns; Loc. = LCCOMB_X18_Y9_N0; Fanout = 2; COMB Node = 'Add1~238'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Add1~236 Add1~238 } "NODE_NAME" } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 7.696 ns Add1~240 8 COMB LCCOMB_X18_Y9_N2 2 " "Info: 8: + IC(0.000 ns) + CELL(0.071 ns) = 7.696 ns; Loc. = LCCOMB_X18_Y9_N2; Fanout = 2; COMB Node = 'Add1~240'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Add1~238 Add1~240 } "NODE_NAME" } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 7.767 ns Add1~242 9 COMB LCCOMB_X18_Y9_N4 2 " "Info: 9: + IC(0.000 ns) + CELL(0.071 ns) = 7.767 ns; Loc. = LCCOMB_X18_Y9_N4; Fanout = 2; COMB Node = 'Add1~242'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Add1~240 Add1~242 } "NODE_NAME" } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 7.838 ns Add1~244 10 COMB LCCOMB_X18_Y9_N6 2 " "Info: 10: + IC(0.000 ns) + CELL(0.071 ns) = 7.838 ns; Loc. = LCCOMB_X18_Y9_N6; Fanout = 2; COMB Node = 'Add1~244'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Add1~242 Add1~244 } "NODE_NAME" } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 7.909 ns Add1~246 11 COMB LCCOMB_X18_Y9_N8 2 " "Info: 11: + IC(0.000 ns) + CELL(0.071 ns) = 7.909 ns; Loc. = LCCOMB_X18_Y9_N8; Fanout = 2; COMB Node = 'Add1~246'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Add1~244 Add1~246 } "NODE_NAME" } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.071 ns) 7.980 ns Add1~248 12 COMB LCCOMB_X18_Y9_N10 2 " "Info: 12: + IC(0.000 ns) + CELL(0.071 ns) = 7.980 ns; Loc. = LCCOMB_X18_Y9_N10; Fanout = 2; COMB Node = 'Add1~248'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.071 ns" { Add1~246 Add1~248 } "NODE_NAME" } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.410 ns) 8.390 ns Add1~249 13 COMB LCCOMB_X18_Y9_N12 1 " "Info: 13: + IC(0.000 ns) + CELL(0.410 ns) = 8.390 ns; Loc. = LCCOMB_X18_Y9_N12; Fanout = 1; COMB Node = 'Add1~249'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.410 ns" { Add1~248 Add1~249 } "NODE_NAME" } } { "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "c:/altera/72/quartus/libraries/vhdl/synopsys/syn_arit.vhd" 1111 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(1.738 ns) + CELL(0.150 ns) 10.278 ns X0~293 14 COMB LCCOMB_X20_Y18_N4 1 " "Info: 14: + IC(1.738 ns) + CELL(0.150 ns) = 10.278 ns; Loc. = LCCOMB_X20_Y18_N4; Fanout = 1; COMB Node = 'X0~293'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.888 ns" { Add1~249 X0~293 } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 19 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.084 ns) 10.362 ns X0\[14\] 15 REG LCFF_X20_Y18_N5 3 " "Info: 15: + IC(0.000 ns) + CELL(0.084 ns) = 10.362 ns; Loc. = LCFF_X20_Y18_N5; Fanout = 3; REG Node = 'X0\[14\]'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.084 ns" { X0~293 X0[14] } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.655 ns ( 25.62 % ) " "Info: Total cell delay = 2.655 ns ( 25.62 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.707 ns ( 74.38 % ) " "Info: Total interconnect delay = 7.707 ns ( 74.38 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "10.362 ns" { CORDIC_Y[3] Add1~228 Add1~230 Add1~232 Add1~234 Add1~236 Add1~238 Add1~240 Add1~242 Add1~244 Add1~246 Add1~248 Add1~249 X0~293 X0[14] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "10.362 ns" { CORDIC_Y[3] {} CORDIC_Y[3]~combout {} Add1~228 {} Add1~230 {} Add1~232 {} Add1~234 {} Add1~236 {} Add1~238 {} Add1~240 {} Add1~242 {} Add1~244 {} Add1~246 {} Add1~248 {} Add1~249 {} X0~293 {} X0[14] {} } { 0.000ns 0.000ns 5.969ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.738ns 0.000ns } { 0.000ns 0.812ns 0.414ns 0.071ns 0.071ns 0.071ns 0.146ns 0.071ns 0.071ns 0.071ns 0.071ns 0.071ns 0.071ns 0.410ns 0.150ns 0.084ns } "" } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.036 ns + " "Info: + Micro setup delay of destination is -0.036 ns" { } { { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0 "" 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK destination 2.626 ns - Shortest register " "Info: - Shortest clock path from clock \"CLOCK\" to destination register is 2.626 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.959 ns) 0.959 ns CLOCK 1 CLK PIN_J2 1 " "Info: 1: + IC(0.000 ns) + CELL(0.959 ns) = 0.959 ns; Loc. = PIN_J2; Fanout = 1; CLK Node = 'CLOCK'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "" { CLOCK } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 10 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.218 ns) + CELL(0.000 ns) 1.177 ns CLOCK~clkctrl 2 COMB CLKCTRL_G3 886 " "Info: 2: + IC(0.218 ns) + CELL(0.000 ns) = 1.177 ns; Loc. = CLKCTRL_G3; Fanout = 886; COMB Node = 'CLOCK~clkctrl'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "0.218 ns" { CLOCK CLOCK~clkctrl } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 10 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_NODE_DELAY" "IC(0.912 ns) + CELL(0.537 ns) 2.626 ns X0\[14\] 3 REG LCFF_X20_Y18_N5 3 " "Info: 3: + IC(0.912 ns) + CELL(0.537 ns) = 2.626 ns; Loc. = LCFF_X20_Y18_N5; Fanout = 3; REG Node = 'X0\[14\]'" { } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "1.449 ns" { CLOCK~clkctrl X0[14] } "NODE_NAME" } } { "jianbo.vhd" "" { Text "E:/新电子资料/我的论文/仿真结果/jianbo/jianbo.vhd" 42 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0 "" 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.496 ns ( 56.97 % ) " "Info: Total cell delay = 1.496 ns ( 56.97 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0 "" 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.130 ns ( 43.03 % ) " "Info: Total interconnect delay = 1.130 ns ( 43.03 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0 "" 0} } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.626 ns" { CLOCK CLOCK~clkctrl X0[14] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.626 ns" { CLOCK {} CLOCK~combout {} CLOCK~clkctrl {} X0[14] {} } { 0.000ns 0.000ns 0.218ns 0.912ns } { 0.000ns 0.959ns 0.000ns 0.537ns } "" } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0 "" 0} } { { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "10.362 ns" { CORDIC_Y[3] Add1~228 Add1~230 Add1~232 Add1~234 Add1~236 Add1~238 Add1~240 Add1~242 Add1~244 Add1~246 Add1~248 Add1~249 X0~293 X0[14] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "10.362 ns" { CORDIC_Y[3] {} CORDIC_Y[3]~combout {} Add1~228 {} Add1~230 {} Add1~232 {} Add1~234 {} Add1~236 {} Add1~238 {} Add1~240 {} Add1~242 {} Add1~244 {} Add1~246 {} Add1~248 {} Add1~249 {} X0~293 {} X0[14] {} } { 0.000ns 0.000ns 5.969ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.738ns 0.000ns } { 0.000ns 0.812ns 0.414ns 0.071ns 0.071ns 0.071ns 0.146ns 0.071ns 0.071ns 0.071ns 0.071ns 0.071ns 0.071ns 0.410ns 0.150ns 0.084ns } "" } } { "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" { Floorplan "c:/altera/72/quartus/bin/TimingClosureFloorplan.fld" "" "2.626 ns" { CLOCK CLOCK~clkctrl X0[14] } "NODE_NAME" } } { "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "" { "TechnologyMapViewer" "c:/altera/72/quartus/bin/Technology_Viewer.qrui" "2.626 ns" { CLOCK {} CLOCK~combout {} CLOCK~clkctrl {} X0[14] {} } { 0.000ns 0.000ns 0.218ns 0.912ns } { 0.000ns 0.959ns 0.000ns 0.537ns } "" } } } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0 "" 0}
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