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📄 cnt5.rpt

📁 使用VHDL语言实现计数器功能 ……使用VHDL语言实现计数器功能
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  _EQ025 = !_LC8_C9
         # !_LC7_C11;

-- Node name is ':1415' 
-- Equation name is '_LC1_C11', type is buried 
_LC1_C11 = LCELL( _EQ026);
  _EQ026 = !sel0 & !sel2;

-- Node name is ':1634' 
-- Equation name is '_LC6_C11', type is buried 
_LC6_C11 = LCELL( _EQ027);
  _EQ027 = !sel0 & !sel1 & !sel2
         #  sel0 &  sel1 &  sel2;

-- Node name is '~1718~1' 
-- Equation name is '~1718~1', location is LC3_C6, type is buried.
-- synthesized logic cell 
_LC3_C6  = LCELL( _EQ028);
  _EQ028 = !_LC1_C9 &  _LC1_C12;

-- Node name is '~1727~1' 
-- Equation name is '~1727~1', location is LC3_C11, type is buried.
-- synthesized logic cell 
_LC3_C11 = LCELL( _EQ029);
  _EQ029 = !sel0 &  sel1 & !sel2
         # !sel1 &  sel2
         #  sel0 & !sel1;

-- Node name is '~1727~2' 
-- Equation name is '~1727~2', location is LC5_C6, type is buried.
-- synthesized logic cell 
_LC5_C6  = LCELL( _EQ030);
  _EQ030 = !_LC1_C9 &  _LC2_C11 &  _LC4_C12
         # !_LC1_C9 &  _LC3_C11 & !_LC4_C12;

-- Node name is '~1727~3' 
-- Equation name is '~1727~3', location is LC7_C6, type is buried.
-- synthesized logic cell 
_LC7_C6  = LCELL( _EQ031);
  _EQ031 =  _LC3_C6 &  _LC6_C11
         #  _LC5_C6 & !_LC6_C6;

-- Node name is ':1727' 
-- Equation name is '_LC1_C6', type is buried 
_LC1_C6  = LCELL( _EQ032);
  _EQ032 = !_LC2_C12 &  _LC7_C6
         # !_LC1_C9 &  _LC2_C12 &  _LC6_C11;

-- Node name is ':1733' 
-- Equation name is '_LC5_C7', type is buried 
_LC5_C7  = LCELL( _EQ033);
  _EQ033 = !_LC1_C9 &  _LC4_C7 &  _LC4_C12
         #  _LC1_C9 & !_LC4_C12
         # !_LC4_C12 &  _LC6_C11;

-- Node name is '~1737~1' 
-- Equation name is '~1737~1', location is LC2_C7, type is buried.
-- synthesized logic cell 
_LC2_C7  = LCELL( _EQ034);
  _EQ034 = !_LC1_C9 &  sel0 & !sel1
         # !_LC1_C9 & !sel1 & !sel2
         # !_LC1_C9 & !sel0 &  sel1
         # !_LC1_C9 & !sel0 & !sel2
         # !_LC1_C9 &  sel1 &  sel2
         # !_LC1_C9 &  sel0 &  sel2;

-- Node name is ':1740' 
-- Equation name is '_LC7_C7', type is buried 
_LC7_C7  = LCELL( _EQ035);
  _EQ035 =  _LC1_C12 & !sel0 &  sel1 &  sel2
         #  _LC1_C12 &  sel0 & !sel1 &  sel2
         #  _LC1_C12 &  sel0 &  sel1 & !sel2;

-- Node name is ':1741' 
-- Equation name is '_LC6_C7', type is buried 
_LC6_C7  = LCELL( _EQ036);
  _EQ036 = !_LC1_C12 &  _LC2_C7 &  _LC3_C12
         # !_LC1_C12 & !_LC3_C12 &  _LC5_C7;

-- Node name is ':1742' 
-- Equation name is '_LC3_C7', type is buried 
_LC3_C7  = LCELL( _EQ037);
  _EQ037 = !_LC2_C12 &  _LC6_C7
         # !_LC2_C12 &  _LC7_C7
         #  _LC2_C12 &  _LC8_C7;

-- Node name is '~1743~1' 
-- Equation name is '~1743~1', location is LC8_C7, type is buried.
-- synthesized logic cell 
_LC8_C7  = LCELL( _EQ038);
  _EQ038 =  sel0 & !sel1 &  sel2
         #  sel0 &  sel1 & !sel2;

-- Node name is ':1751' 
-- Equation name is '_LC5_C9', type is buried 
_LC5_C9  = LCELL( _EQ039);
  _EQ039 =  _LC3_C12 &  _LC8_C9
         #  _LC1_C9 &  _LC3_C12
         #  _LC4_C9;

-- Node name is ':1753' 
-- Equation name is '_LC4_C9', type is buried 
_LC4_C9  = LCELL( _EQ040);
  _EQ040 =  _LC4_C12 & !sel2
         #  _LC4_C12 &  sel0 &  sel1
         #  _LC4_C12 & !sel0 & !sel1;

-- Node name is ':1754' 
-- Equation name is '_LC2_C9', type is buried 
_LC2_C9  = LCELL( _EQ041);
  _EQ041 = !_LC1_C9 &  _LC1_C12 &  _LC3_C9
         # !_LC1_C12 &  _LC5_C9;

-- Node name is ':1757' 
-- Equation name is '_LC5_C11', type is buried 
_LC5_C11 = LCELL( _EQ042);
  _EQ042 =  _LC2_C9 & !_LC2_C12
         #  _LC2_C12 &  _LC8_C11;

-- Node name is ':1766' 
-- Equation name is '_LC8_C12', type is buried 
_LC8_C12 = LCELL( _EQ043);
  _EQ043 =  _LC3_C12 &  _LC4_C11
         #  _LC4_C11 & !_LC4_C12
         #  _LC1_C11 & !_LC3_C12 &  _LC4_C12;

-- Node name is '~1767~1' 
-- Equation name is '~1767~1', location is LC4_C11, type is buried.
-- synthesized logic cell 
_LC4_C11 = LCELL( _EQ044);
  _EQ044 =  sel0 &  sel1
         #  sel1 & !sel2
         # !sel1 &  sel2
         #  sel0 &  sel2;

-- Node name is ':1769' 
-- Equation name is '_LC4_C4', type is buried 
_LC4_C4  = LCELL( _EQ045);
  _EQ045 = !_LC1_C12 &  _LC8_C12
         #  _LC1_C12 &  _LC3_C4
         #  _LC1_C9 &  _LC1_C12;

-- Node name is ':1772' 
-- Equation name is '_LC6_C4', type is buried 
_LC6_C4  = LCELL( _EQ046);
  _EQ046 = !_LC2_C12 &  _LC4_C4
         #  _LC2_C12 &  _LC5_C4;

-- Node name is '~1773~1' 
-- Equation name is '~1773~1', location is LC5_C4, type is buried.
-- synthesized logic cell 
_LC5_C4  = LCELL( _EQ047);
  _EQ047 =  sel0 &  sel1
         #  sel0 &  sel2
         #  sel1 & !sel2;

-- Node name is ':1897' 
-- Equation name is '_LC2_C1', type is buried 
!_LC2_C1 = _LC2_C1~NOT;
_LC2_C1~NOT = LCELL( _EQ048);
  _EQ048 = !tmp0
         # !tmp1
         #  tmp2;

-- Node name is ':1904' 
-- Equation name is '_LC8_C1', type is buried 
_LC8_C1  = LCELL( _EQ049);
  _EQ049 = !tmp0 & !tmp1 &  tmp2;

-- Node name is '~2169~1' 
-- Equation name is '~2169~1', location is LC5_C1, type is buried.
-- synthesized logic cell 
_LC5_C1  = LCELL( _EQ050);
  _EQ050 = !tmp1 & !tmp2
         # !tmp0 & !tmp2;

-- Node name is '~2187~1' 
-- Equation name is '~2187~1', location is LC7_C4, type is buried.
-- synthesized logic cell 
_LC7_C4  = LCELL( _EQ051);
  _EQ051 = !_LC8_C1 &  sel0
         #  _LC8_C1 &  sel1;

-- Node name is '~2187~2' 
-- Equation name is '~2187~2', location is LC8_C4, type is buried.
-- synthesized logic cell 
_LC8_C4  = LCELL( _EQ052);
  _EQ052 =  _LC2_C1 &  sel2
         # !_LC2_C1 &  _LC7_C4;

-- Node name is ':2840' 
-- Equation name is '_LC3_B7', type is buried 
_LC3_B7  = LCELL( _EQ053);
  _EQ053 =  q_s1 & !q_s3
         #  q_s0 &  q_s2 & !q_s3
         # !q_s1 & !q_s2 &  q_s3
         # !q_s0 & !q_s2 & !q_s3;

-- Node name is ':2873' 
-- Equation name is '_LC5_B7', type is buried 
_LC5_B7  = LCELL( _EQ054);
  _EQ054 = !q_s0 & !q_s1 & !q_s3
         # !q_s1 & !q_s2
         #  q_s0 &  q_s1 & !q_s3
         # !q_s2 & !q_s3;

-- Node name is ':2906' 
-- Equation name is '_LC7_B7', type is buried 
_LC7_B7  = LCELL( _EQ055);
  _EQ055 = !q_s1 & !q_s2
         #  q_s2 & !q_s3
         # !q_s1 & !q_s3
         #  q_s0 & !q_s3;

-- Node name is ':2939' 
-- Equation name is '_LC1_B7', type is buried 
_LC1_B7  = LCELL( _EQ056);
  _EQ056 = !q_s0 & !q_s2 & !q_s3
         #  q_s1 & !q_s2 & !q_s3
         #  q_s0 & !q_s1 &  q_s2 & !q_s3
         # !q_s0 &  q_s1 & !q_s3
         # !q_s0 & !q_s1 & !q_s2
         # !q_s1 & !q_s2 &  q_s3;

-- Node name is ':2972' 
-- Equation name is '_LC2_B7', type is buried 
_LC2_B7  = LCELL( _EQ057);
  _EQ057 = !q_s0 & !q_s2 & !q_s3
         # !q_s0 & !q_s1 & !q_s2
         # !q_s0 &  q_s1 & !q_s3;

-- Node name is ':3005' 
-- Equation name is '_LC4_B7', type is buried 
_LC4_B7  = LCELL( _EQ058);
  _EQ058 = !q_s0 & !q_s1 & !q_s3
         # !q_s1 &  q_s2 & !q_s3
         # !q_s0 &  q_s2 & !q_s3
         # !q_s0 & !q_s1 & !q_s2
         # !q_s1 & !q_s2 &  q_s3;

-- Node name is ':3040' 
-- Equation name is '_LC6_B7', type is buried 
_LC6_B7  = LCELL( _EQ059);
  _EQ059 =  q_s1 & !q_s2 & !q_s3
         # !q_s1 &  q_s2 & !q_s3
         # !q_s0 &  q_s1 & !q_s3
         # !q_s1 & !q_s2 &  q_s3;



Project Information                                        e:\jishuqi\cnt5.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Multi-Level

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'FLEX10K' family

      CARRY_CHAIN                         = ignore
      CARRY_CHAIN_LENGTH                  = 32
      CASCADE_CHAIN                       = ignore
      CASCADE_CHAIN_LENGTH                = 2
      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SUBFACTOR_EXTRACTION                = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Use Quartus Fitter                        = on
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:00
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:00
   Partitioner                            00:00:00
   Fitter                                 00:00:01
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:00
   --------------------------             --------
   Total Time                             00:00:01


Memory Allocated
-----------------

Peak memory allocated during compilation  = 10,911K

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