📄 cnt5.rpt
字号:
- 1 - C 11 AND2 2 0 0 1 :1415
- 6 - C 11 OR2 3 0 0 3 :1634
- 3 - C 06 AND2 s 0 2 0 1 ~1718~1
- 3 - C 11 OR2 s 3 0 0 1 ~1727~1
- 5 - C 06 OR2 s 0 4 0 1 ~1727~2
- 7 - C 06 OR2 s 0 4 0 1 ~1727~3
- 1 - C 06 OR2 0 4 1 1 :1727
- 5 - C 07 OR2 0 4 0 1 :1733
- 2 - C 07 OR2 s 3 1 0 1 ~1737~1
- 7 - C 07 OR2 3 1 0 1 :1740
- 6 - C 07 OR2 0 4 0 1 :1741
- 3 - C 07 OR2 0 4 1 1 :1742
- 8 - C 07 OR2 s 3 0 0 1 ~1743~1
- 5 - C 09 OR2 0 4 0 1 :1751
- 4 - C 09 OR2 3 1 0 1 :1753
- 2 - C 09 OR2 0 4 0 1 :1754
- 5 - C 11 OR2 0 3 1 1 :1757
- 8 - C 12 OR2 0 4 0 1 :1766
- 4 - C 11 OR2 s 3 0 0 1 ~1767~1
- 4 - C 04 OR2 0 4 0 1 :1769
- 6 - C 04 OR2 0 3 1 1 :1772
- 5 - C 04 OR2 s 3 0 0 1 ~1773~1
- 2 - C 01 OR2 ! 0 3 0 3 :1897
- 8 - C 01 AND2 0 3 0 3 :1904
- 5 - C 01 OR2 s 0 3 0 5 ~2169~1
- 7 - C 04 OR2 s 2 1 0 1 ~2187~1
- 8 - C 04 OR2 s 1 2 0 1 ~2187~2
- 3 - B 07 OR2 0 4 1 0 :2840
- 5 - B 07 OR2 0 4 1 0 :2873
- 7 - B 07 OR2 0 4 1 0 :2906
- 1 - B 07 OR2 0 4 1 0 :2939
- 2 - B 07 OR2 0 4 1 0 :2972
- 4 - B 07 OR2 0 4 1 0 :3005
- 6 - B 07 OR2 0 4 1 0 :3040
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register
Device-Specific Information: e:\jishuqi\cnt5.rpt
cnt5
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 0/ 96( 0%) 4/ 48( 8%) 0/ 48( 0%) 0/16( 0%) 4/16( 25%) 0/16( 0%)
B: 1/ 96( 1%) 7/ 48( 14%) 0/ 48( 0%) 0/16( 0%) 4/16( 25%) 0/16( 0%)
C: 7/ 96( 7%) 18/ 48( 37%) 0/ 48( 0%) 2/16( 12%) 4/16( 25%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 3/24( 12%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
02: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
03: 3/24( 12%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
04: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
05: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
06: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 3/24( 12%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
10: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
13: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
16: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
18: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
19: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
20: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
21: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
22: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: e:\jishuqi\cnt5.rpt
cnt5
** CLOCK SIGNALS **
Type Fan-out Name
INPUT 13 ck
INPUT 3 clk
Device-Specific Information: e:\jishuqi\cnt5.rpt
cnt5
** EQUATIONS **
ck : INPUT;
clk : INPUT;
sel0 : INPUT;
sel1 : INPUT;
sel2 : INPUT;
-- Node name is 'duan0'
-- Equation name is 'duan0', type is output
duan0 = _LC1_C1;
-- Node name is 'duan1'
-- Equation name is 'duan1', type is output
duan1 = _LC3_C1;
-- Node name is 'duan2'
-- Equation name is 'duan2', type is output
duan2 = _LC6_C1;
-- Node name is 'duan3'
-- Equation name is 'duan3', type is output
duan3 = _LC8_C2;
-- Node name is 'duan4'
-- Equation name is 'duan4', type is output
duan4 = _LC1_C3;
-- Node name is 'duan5'
-- Equation name is 'duan5', type is output
duan5 = _LC2_C4;
-- Node name is ':38' = 'q_s0'
-- Equation name is 'q_s0', location is LC1_C4, type is buried.
q_s0 = DFFE( _EQ001, GLOBAL( ck), VCC, VCC, VCC);
_EQ001 = _LC5_C1 & _LC6_C4
# !_LC5_C1 & _LC8_C4;
-- Node name is ':37' = 'q_s1'
-- Equation name is 'q_s1', location is LC2_C6, type is buried.
q_s1 = DFFE( _EQ002, GLOBAL( ck), VCC, VCC, VCC);
_EQ002 = _LC5_C1 & _LC5_C11;
-- Node name is ':36' = 'q_s2'
-- Equation name is 'q_s2', location is LC1_C7, type is buried.
q_s2 = DFFE( _EQ003, GLOBAL( ck), VCC, VCC, VCC);
_EQ003 = _LC3_C7 & _LC5_C1;
-- Node name is ':35' = 'q_s3'
-- Equation name is 'q_s3', location is LC4_C6, type is buried.
q_s3 = DFFE( _EQ004, GLOBAL( ck), VCC, VCC, VCC);
_EQ004 = _LC1_C6 & _LC5_C1;
-- Node name is 'sm0'
-- Equation name is 'sm0', type is output
sm0 = _LC6_B7;
-- Node name is 'sm1'
-- Equation name is 'sm1', type is output
sm1 = _LC4_B7;
-- Node name is 'sm2'
-- Equation name is 'sm2', type is output
sm2 = _LC2_B7;
-- Node name is 'sm3'
-- Equation name is 'sm3', type is output
sm3 = _LC1_B7;
-- Node name is 'sm4'
-- Equation name is 'sm4', type is output
sm4 = _LC7_B7;
-- Node name is 'sm5'
-- Equation name is 'sm5', type is output
sm5 = _LC5_B7;
-- Node name is 'sm6'
-- Equation name is 'sm6', type is output
sm6 = _LC3_B7;
-- Node name is ':31' = 'state0'
-- Equation name is 'state0', location is LC6_C12, type is buried.
state0 = DFFE( _EQ005, GLOBAL( clk), VCC, VCC, VCC);
_EQ005 = _LC2_C12
# _LC3_C12;
-- Node name is ':30' = 'state1'
-- Equation name is 'state1', location is LC7_C12, type is buried.
state1 = DFFE( _EQ006, GLOBAL( clk), VCC, VCC, VCC);
_EQ006 = _LC1_C12 & !_LC2_C12
# !_LC2_C12 & _LC3_C12;
-- Node name is ':29' = 'state2'
-- Equation name is 'state2', location is LC5_C12, type is buried.
state2 = DFFE( _LC4_C12, GLOBAL( clk), VCC, VCC, VCC);
-- Node name is ':34' = 'tmp0'
-- Equation name is 'tmp0', location is LC2_C8, type is buried.
tmp0 = DFFE(!tmp0, GLOBAL( ck), VCC, VCC, VCC);
-- Node name is ':33' = 'tmp1'
-- Equation name is 'tmp1', location is LC4_C1, type is buried.
tmp1 = DFFE( _EQ007, GLOBAL( ck), VCC, VCC, VCC);
_EQ007 = !tmp0 & tmp1
# tmp0 & !tmp1 & !tmp2;
-- Node name is ':32' = 'tmp2'
-- Equation name is 'tmp2', location is LC7_C1, type is buried.
tmp2 = DFFE( _EQ008, GLOBAL( ck), VCC, VCC, VCC);
_EQ008 = !tmp0 & tmp2
# tmp0 & tmp1 & !tmp2;
-- Node name is 'y0'
-- Equation name is 'y0', type is output
y0 = _LC6_C4;
-- Node name is 'y1'
-- Equation name is 'y1', type is output
y1 = _LC5_C11;
-- Node name is 'y2'
-- Equation name is 'y2', type is output
y2 = _LC3_C7;
-- Node name is 'y3'
-- Equation name is 'y3', type is output
y3 = _LC1_C6;
-- Node name is ':10'
-- Equation name is '_LC2_C4', type is buried
_LC2_C4 = DFFE( _EQ009, GLOBAL( ck), VCC, VCC, VCC);
_EQ009 = !_LC2_C1 & !_LC5_C1 & !_LC8_C1;
-- Node name is ':12'
-- Equation name is '_LC1_C3', type is buried
_LC1_C3 = DFFE( _LC8_C1, GLOBAL( ck), VCC, VCC, VCC);
-- Node name is ':14'
-- Equation name is '_LC8_C2', type is buried
_LC8_C2 = DFFE( _LC2_C1, GLOBAL( ck), VCC, VCC, VCC);
-- Node name is ':16'
-- Equation name is '_LC6_C1', type is buried
_LC6_C1 = DFFE( _EQ010, GLOBAL( ck), VCC, VCC, VCC);
_EQ010 = !tmp0 & tmp1 & !tmp2;
-- Node name is ':18'
-- Equation name is '_LC3_C1', type is buried
_LC3_C1 = DFFE( _EQ011, GLOBAL( ck), VCC, VCC, VCC);
_EQ011 = tmp0 & !tmp1 & !tmp2;
-- Node name is ':20'
-- Equation name is '_LC1_C1', type is buried
_LC1_C1 = DFFE( _EQ012, GLOBAL( ck), VCC, VCC, VCC);
_EQ012 = !tmp0 & !tmp1 & !tmp2;
-- Node name is ':107'
-- Equation name is '_LC3_C12', type is buried
_LC3_C12 = LCELL( _EQ013);
_EQ013 = !state0 & state1 & !state2;
-- Node name is ':117'
-- Equation name is '_LC1_C12', type is buried
_LC1_C12 = LCELL( _EQ014);
_EQ014 = state0 & !state1 & !state2;
-- Node name is '~127~1'
-- Equation name is '~127~1', location is LC2_C11, type is buried.
-- synthesized logic cell
_LC2_C11 = LCELL( _EQ015);
_EQ015 = sel0 & !sel1 & sel2
# _LC8_C11 & sel1 & sel2
# _LC8_C11 & sel0 & sel2
# _LC8_C11 & !sel0 & !sel1 & !sel2;
-- Node name is ':127'
-- Equation name is '_LC2_C12', type is buried
_LC2_C12 = LCELL( _EQ016);
_EQ016 = !state0 & !state1 & !state2;
-- Node name is ':132'
-- Equation name is '_LC4_C12', type is buried
_LC4_C12 = LCELL( _EQ017);
_EQ017 = state0 & state1 & !state2;
-- Node name is ':142'
-- Equation name is '_LC6_C6', type is buried
!_LC6_C6 = _LC6_C6~NOT;
_LC6_C6~NOT = LCELL( _EQ018);
_EQ018 = !_LC1_C12 & !_LC3_C12;
-- Node name is ':393'
-- Equation name is '_LC1_C9', type is buried
_LC1_C9 = LCELL( _EQ019);
_EQ019 = !sel0 & !sel1 & !sel2;
-- Node name is ':435'
-- Equation name is '_LC8_C11', type is buried
!_LC8_C11 = _LC8_C11~NOT;
_LC8_C11~NOT = LCELL( _EQ020);
_EQ020 = !sel1
# sel0
# !sel2;
-- Node name is ':828'
-- Equation name is '_LC7_C11', type is buried
!_LC7_C11 = _LC7_C11~NOT;
_LC7_C11~NOT = LCELL( _EQ021);
_EQ021 = !sel0 & !sel1 & sel2
# !_LC8_C11 & !sel0
# !_LC8_C11 & sel1 & sel2
# !_LC8_C11 & !sel1 & !sel2;
-- Node name is ':858'
-- Equation name is '_LC3_C9', type is buried
_LC3_C9 = LCELL( _EQ022);
_EQ022 = sel0 & !sel1 & sel2
# !_LC8_C9;
-- Node name is ':887'
-- Equation name is '_LC3_C4', type is buried
_LC3_C4 = LCELL( _EQ023);
_EQ023 = !sel0 & !sel1 & sel2
# !sel0 & sel1 & !sel2;
-- Node name is ':1128'
-- Equation name is '_LC8_C9', type is buried
!_LC8_C9 = _LC8_C9~NOT;
_LC8_C9~NOT = LCELL( _EQ024);
_EQ024 = sel0 & !sel1 & !sel2
# !sel0 & sel1 & !sel2;
-- Node name is ':1364'
-- Equation name is '_LC4_C7', type is buried
_LC4_C7 = LCELL( _EQ025);
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