irda.map.qmsg

在FPGA上开发红外传输接口

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.0 Build 214 3/25/2004 Service Pack 1 SJ Full Version " "Info: Version 4.0 Build 214 3/25/2004 Service Pack 1 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun Jun 05 17:42:44 2005 " "Info: Processing started: Sun Jun 05 17:42:44 2005" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --import_settings_files=on --export_settings_files=off irda -c irda " "Info: Command: quartus_map --import_settings_files=on --export_settings_files=off irda -c irda" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "irda.v 1 1 " "Info: Found 1 design units and 1 entities in source file irda.v" { { "Info" "ISGN_ENTITY_NAME" "1 irda " "Info: Found entity 1: irda" {  } { { "F:/work/irda/irda.v" "irda" "" { Text "F:/work/irda/irda.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "IOPT_INFERENCING_SUMMARY" "3 " "Info: Inferred 3 megafunctions from design logic" { { "Info" "IOPT_LPM_COUNTER_INFERRED" "pulse_cnt\[0\]~0 4 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=4) from the following logic: pulse_cnt\[0\]~0" {  } { { "F:/work/irda/irda.v" "" "pulse_cnt\[0\]~0" { Text "F:/work/irda/irda.v" 29 -1 0 } }  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "cnt\[0\]~0 9 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=9) from the following logic: cnt\[0\]~0" {  } { { "F:/work/irda/irda.v" "" "cnt\[0\]~0" { Text "F:/work/irda/irda.v" 60 -1 0 } }  } 0} { "Info" "IOPT_LPM_COUNTER_INFERRED" "slow_cnt\[0\]~0 24 " "Info: Inferred lpm_counter megafunction (LPM_WIDTH=24) from the following logic: slow_cnt\[0\]~0" {  } { { "F:/work/irda/irda.v" "" "slow_cnt\[0\]~0" { Text "F:/work/irda/irda.v" 39 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/quartus/libraries/megafunctions/lpm_counter.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file e:/quartus/libraries/megafunctions/lpm_counter.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_counter " "Info: Found entity 1: lpm_counter" {  } { { "e:/quartus/libraries/megafunctions/lpm_counter.tdf" "lpm_counter" "" { Text "e:/quartus/libraries/megafunctions/lpm_counter.tdf" 221 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "e:/quartus/libraries/megafunctions/alt_counter_f10ke.tdf 1 1 " "Info: Found 1 design units and 1 entities in source file e:/quartus/libraries/megafunctions/alt_counter_f10ke.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 alt_counter_f10ke " "Info: Found entity 1: alt_counter_f10ke" {  } { { "e:/quartus/libraries/megafunctions/alt_counter_f10ke.tdf" "alt_counter_f10ke" "" { Text "e:/quartus/libraries/megafunctions/alt_counter_f10ke.tdf" 256 1 0 } }  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "59 " "Info: Implemented 59 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "4 " "Info: Implemented 4 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "3 " "Info: Implemented 3 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "52 " "Info: Implemented 52 logic cells" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Sun Jun 05 17:42:46 2005 " "Info: Processing ended: Sun Jun 05 17:42:46 2005" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0}  } {  } 0}