tlc5615.fit.eqn

TLC5615串行DA的驱动接口,采用verilog编程

B1_cter[8]_lut_out = B1L2 & F1_unreg_res_node[8] # !A1L7;
B1_cter[8] = DFFEA(B1_cter[8]_lut_out, GLOBAL(clk), !rst, , , , );

--B1L72Q is ctrl:HH|cter[8]~618 at LC3_E45
--operation mode is normal

B1L72Q = B1_cter[8];


--B1_cter[7] is ctrl:HH|cter[7] at LC7_E45
--operation mode is normal

B1_cter[7]_lut_out = B1L2 & H3_cs_buffer[7] # !A1L7;
B1_cter[7] = DFFEA(B1_cter[7]_lut_out, GLOBAL(clk), !rst, , , , );

--B1L52Q is ctrl:HH|cter[7]~619 at LC7_E45
--operation mode is normal

B1L52Q = B1_cter[7];


--B1_cter[6] is ctrl:HH|cter[6] at LC6_E45
--operation mode is normal

B1_cter[6]_lut_out = B1L2 & H3_cs_buffer[6] # !A1L7;
B1_cter[6] = DFFEA(B1_cter[6]_lut_out, GLOBAL(clk), !rst, , , , );

--B1L32Q is ctrl:HH|cter[6]~620 at LC6_E45
--operation mode is normal

B1L32Q = B1_cter[6];


--B1_cter[5] is ctrl:HH|cter[5] at LC5_E45
--operation mode is normal

B1_cter[5]_lut_out = B1L2 & H3_cs_buffer[5] # !A1L7;
B1_cter[5] = DFFEA(B1_cter[5]_lut_out, GLOBAL(clk), !rst, , , , );

--B1L12Q is ctrl:HH|cter[5]~621 at LC5_E45
--operation mode is normal

B1L12Q = B1_cter[5];


--B1_cter[4] is ctrl:HH|cter[4] at LC4_E45
--operation mode is normal

B1_cter[4]_lut_out = H3_cs_buffer[4] & B1L2;
B1_cter[4] = DFFEA(B1_cter[4]_lut_out, GLOBAL(clk), !rst, , A1L7, , );

--B1L91Q is ctrl:HH|cter[4]~622 at LC4_E45
--operation mode is normal

B1L91Q = B1_cter[4];


--B1L74 is ctrl:HH|reduce_nor~94 at LC1_E45
--operation mode is normal

B1L74 = B1_cter[7] & B1_cter[6] & B1_cter[5] & B1_cter[4];

--B1L25 is ctrl:HH|reduce_nor~100 at LC1_E45
--operation mode is normal

B1L25 = B1_cter[7] & B1_cter[6] & B1_cter[5] & B1_cter[4];


--B1L1 is ctrl:HH|LessThan~106 at LC1_E44
--operation mode is normal

B1L1 = B1_cter[3] & B1_cter[8] & B1L74;

--B1L4 is ctrl:HH|LessThan~109 at LC1_E44
--operation mode is normal

B1L4 = B1_cter[3] & B1_cter[8] & B1L74;


--B1L54 is ctrl:HH|reduce_nor~1 at LC2_E44
--operation mode is normal

B1L54 = B1_cter[2] # B1_cter[1] # !B1_cter[0] # !B1L1;

--B1L35 is ctrl:HH|reduce_nor~101 at LC2_E44
--operation mode is normal

B1L35 = B1_cter[2] # B1_cter[1] # !B1_cter[0] # !B1L1;


--B1L84 is ctrl:HH|reduce_nor~95 at LC7_E47
--operation mode is normal

B1L84 = B1_cter[0] & !B1_cter[3];

--B1L45 is ctrl:HH|reduce_nor~102 at LC7_E47
--operation mode is normal

B1L45 = B1_cter[0] & !B1_cter[3];


--B1L94 is ctrl:HH|reduce_nor~96 at LC3_E47
--operation mode is normal

B1L94 = B1_cter[8] & B1L74 & B1_cter[1] & B1L84;

--B1L55 is ctrl:HH|reduce_nor~103 at LC3_E47
--operation mode is normal

B1L55 = B1_cter[8] & B1L74 & B1_cter[1] & B1L84;


--C1_data[9] is sin_rom:HJ|data[9] at LC3_E34
--operation mode is normal

C1_data[9]_lut_out = !B1_mem_addr[5];
C1_data[9] = DFFEA(C1_data[9]_lut_out, GLOBAL(clk), , , , , );

--C1L12Q is sin_rom:HJ|data[9]~1 at LC3_E34
--operation mode is normal

C1L12Q = C1_data[9];


--B1L05 is ctrl:HH|reduce_nor~97 at LC8_E47
--operation mode is normal

B1L05 = B1_cter[8] # B1_cter[3] # !B1_cter[0] # !B1_cter[2];

--B1L65 is ctrl:HH|reduce_nor~104 at LC8_E47
--operation mode is normal

B1L65 = B1_cter[8] # B1_cter[3] # !B1_cter[0] # !B1_cter[2];


--B1L15 is ctrl:HH|reduce_nor~98 at LC6_E47
--operation mode is normal

B1L15 = !B1_cter[1] & !B1L05 & B1L74;

--B1L75 is ctrl:HH|reduce_nor~105 at LC6_E47
--operation mode is normal

B1L75 = !B1_cter[1] & !B1L05 & B1L74;


--B1_wr_data[8] is ctrl:HH|wr_data[8] at LC1_E35
--operation mode is normal

B1_wr_data[8]_lut_out = C1_data[8];
B1_wr_data[8] = DFFEA(B1_wr_data[8]_lut_out, GLOBAL(clk), !rst, , B1L15, , );

--B1L77Q is ctrl:HH|wr_data[8]~21 at LC1_E35
--operation mode is normal

B1L77Q = B1_wr_data[8];


--D1_reg_data[7] is tlc5615_1:TLC|reg_data[7] at LC4_E43
--operation mode is normal

D1_reg_data[7]_lut_out = D1L02 & B1_wr_data[7] # !D1L02 & (D1L77);
D1_reg_data[7] = DFFEA(D1_reg_data[7]_lut_out, GLOBAL(clk), !rst, , , , );

--D1L07Q is tlc5615_1:TLC|reg_data[7]~1921 at LC4_E43
--operation mode is normal

D1L07Q = D1_reg_data[7];


--D1L67 is tlc5615_1:TLC|reg_data~1901 at LC5_E43
--operation mode is normal

D1L67 = D1L91 & D1_reg_data[7] # !D1L91 & (D1_reg_data[8]);

--D1L58 is tlc5615_1:TLC|reg_data~1922 at LC5_E43
--operation mode is normal

D1L58 = D1L91 & D1_reg_data[7] # !D1L91 & (D1_reg_data[8]);


--D1L51 is tlc5615_1:TLC|add~78 at LC1_G39
--operation mode is normal

D1L51 = D1_scounter[3] $ (D1_scounter[2] & D1_scounter[1] & D1_scounter[0]);

--D1L71 is tlc5615_1:TLC|add~80 at LC1_G39
--operation mode is normal

D1L71 = D1_scounter[3] $ (D1_scounter[2] & D1_scounter[1] & D1_scounter[0]);


--A1L6 is rtl~1 at LC6_E48
--operation mode is normal

A1L6 = D1_SCL & D1_scl_d # !D1_SNCS;

--A1L11 is rtl~533 at LC6_E48
--operation mode is normal

A1L11 = D1_SCL & D1_scl_d # !D1_SNCS;


--D1L61 is tlc5615_1:TLC|add~79 at LC3_G39
--operation mode is normal

D1L61 = D1_scounter[1] & D1_scounter[0];

--D1L81 is tlc5615_1:TLC|add~81 at LC3_G39
--operation mode is normal

D1L81 = D1_scounter[1] & D1_scounter[0];


--A1L8 is rtl~528 at LC5_G39
--operation mode is normal

A1L8 = D1_SNCS & (D1_scounter[1] $ D1_scounter[0] # !D1L32);

--A1L21 is rtl~534 at LC5_G39
--operation mode is normal

A1L21 = D1_SNCS & (D1_scounter[1] $ D1_scounter[0] # !D1L32);


--A1L9 is rtl~529 at LC7_G39
--operation mode is normal

A1L9 = D1_scounter[3] & D1_scounter[2] & (D1_scounter[1] # D1_scounter[0]);

--A1L31 is rtl~535 at LC7_G39
--operation mode is normal

A1L31 = D1_scounter[3] & D1_scounter[2] & (D1_scounter[1] # D1_scounter[0]);


--A1L01 is rtl~530 at LC8_G39
--operation mode is normal

A1L01 = A1L9 # D1_SCL & D1_scl_d # !D1_SNCS;

--A1L41 is rtl~536 at LC8_G39
--operation mode is normal

A1L41 = A1L9 # D1_SCL & D1_scl_d # !D1_SNCS;


--H9_cs_buffer[4] is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4] at LC1_G48
--operation mode is arithmetic

H9_cs_buffer[4] = D1_cter[4] $ H9_cout[3];

--H9L81 is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~95 at LC1_G48
--operation mode is arithmetic

H9L81 = D1_cter[4] $ H9_cout[3];

--H9_cout[4] is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[4] at LC1_G48
--operation mode is arithmetic

H9_cout[4] = CARRY(D1_cter[4] & H9_cout[3]);


--H9_cs_buffer[3] is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] at LC8_G46
--operation mode is arithmetic

H9_cs_buffer[3] = D1_cter[3] $ H9_cout[2];

--H9L61 is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~96 at LC8_G46
--operation mode is arithmetic

H9L61 = D1_cter[3] $ H9_cout[2];

--H9_cout[3] is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3] at LC8_G46
--operation mode is arithmetic

H9_cout[3] = CARRY(D1_cter[3] & H9_cout[2]);


--H9_cs_buffer[2] is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] at LC7_G46
--operation mode is arithmetic

H9_cs_buffer[2] = D1_cter[2] $ H9_cout[1];

--H9L41 is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~97 at LC7_G46
--operation mode is arithmetic

H9L41 = D1_cter[2] $ H9_cout[1];

--H9_cout[2] is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2] at LC7_G46
--operation mode is arithmetic

H9_cout[2] = CARRY(D1_cter[2] & H9_cout[1]);


--H9_cs_buffer[1] is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] at LC6_G46
--operation mode is arithmetic

H9_cs_buffer[1] = D1_cter[1] $ H9_cout[0];

--H9L21 is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~98 at LC6_G46
--operation mode is arithmetic

H9L21 = D1_cter[1] $ H9_cout[0];

--H9_cout[1] is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[1] at LC6_G46
--operation mode is arithmetic

H9_cout[1] = CARRY(D1_cter[1] & H9_cout[0]);


--H9_cs_buffer[7] is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] at LC4_G48
--operation mode is arithmetic

H9_cs_buffer[7] = D1_cter[7] $ H9_cout[6];

--H9L42 is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]~99 at LC4_G48
--operation mode is arithmetic

H9L42 = D1_cter[7] $ H9_cout[6];

--H9_cout[7] is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[7] at LC4_G48
--operation mode is arithmetic

H9_cout[7] = CARRY(D1_cter[7] & H9_cout[6]);


--D1L2 is tlc5615_1:TLC|LessThan~138 at LC4_G51
--operation mode is normal

D1L2 = D1L1 & (!D1L15 # !D1_cter[0]);

--D1L4 is tlc5615_1:TLC|LessThan~140 at LC4_G51
--operation mode is normal

D1L4 = D1L1 & (!D1L15 # !D1_cter[0]);


--H9_cs_buffer[6] is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[6] at LC3_G48
--operation mode is arithmetic

H9_cs_buffer[6] = D1_cter[6] $ H9_cout[5];

--H9L22 is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]~100 at LC3_G48
--operation mode is arithmetic

H9L22 = D1_cter[6] $ H9_cout[5];

--H9_cout[6] is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[6] at LC3_G48
--operation mode is arithmetic

H9_cout[6] = CARRY(D1_cter[6] & H9_cout[5]);


--H9_cs_buffer[5] is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5] at LC2_G48
--operation mode is arithmetic

H9_cs_buffer[5] = D1_cter[5] $ H9_cout[4];

--H9L02 is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]~101 at LC2_G48
--operation mode is arithmetic

H9L02 = D1_cter[5] $ H9_cout[4];

--H9_cout[5] is tlc5615_1:TLC|lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[5] at LC2_G48
--operation mode is arithmetic

H9_cout[5] = CARRY(D1_cter[5] & H9_cout[4]);


--H3_cs_buffer[2] is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2] at LC2_E38
--operation mode is arithmetic

H3_cs_buffer[2] = B1_cter[2] $ H3_cout[1];

--H3L31 is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~95 at LC2_E38
--operation mode is arithmetic

H3L31 = B1_cter[2] $ H3_cout[1];

--H3_cout[2] is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[2] at LC2_E38
--operation mode is arithmetic

H3_cout[2] = CARRY(B1_cter[2] & H3_cout[1]);


--B1L2 is ctrl:HH|LessThan~107 at LC8_E45
--operation mode is normal

B1L2 = !B1_cter[0] & !B1_cter[2] & !B1_cter[1] # !B1L1;

--B1L5 is ctrl:HH|LessThan~110 at LC8_E45
--operation mode is normal

B1L5 = !B1_cter[0] & !B1_cter[2] & !B1_cter[1] # !B1L1;


--H3_cs_buffer[1] is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1] at LC1_E38
--operation mode is arithmetic

H3_cs_buffer[1] = B1_cter[1] $ B1_cter[0];

--H3L11 is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~96 at LC1_E38
--operation mode is arithmetic

H3L11 = B1_cter[1] $ B1_cter[0];

--H3_cout[1] is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[1] at LC1_E38
--operation mode is arithmetic

H3_cout[1] = CARRY(B1_cter[1] & B1_cter[0]);


--H3_cs_buffer[3] is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3] at LC3_E38
--operation mode is arithmetic

H3_cs_buffer[3] = B1_cter[3] $ H3_cout[2];

--H3L51 is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~97 at LC3_E38
--operation mode is arithmetic

H3L51 = B1_cter[3] $ H3_cout[2];

--H3_cout[3] is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[3] at LC3_E38
--operation mode is arithmetic

H3_cout[3] = CARRY(B1_cter[3] & H3_cout[2]);


--H3_cs_buffer[7] is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[7] at LC7_E38
--operation mode is arithmetic

H3_cs_buffer[7] = B1_cter[7] $ H3_cout[6];

--H3L32 is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[7]~98 at LC7_E38
--operation mode is arithmetic

H3L32 = B1_cter[7] $ H3_cout[6];

--H3_cout[7] is ctrl:HH|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[7] at LC7_E38
--operation mode is arithmetic