tlc5615.tan.summary

TLC5615串行DA的驱动接口,采用verilog编程

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Timing Analyzer Summary
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Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 13.200 ns
From           : tlc5615_1:TLC|SCL
To             : SCL
From Clock     : clk
To Clock       : 
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : 73.53 MHz ( period = 13.600 ns )
From           : ctrl:HH|cter[7]
To             : ctrl:HH|mem_addr[0]
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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