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📁 在QuartusII里用VHDL仿真实现电梯控制器
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// Copyright (C) 1991-2007 Altera Corporation
// Your use of Altera Corporation's design tools, logic functions 
// and other software and tools, and its AMPP partner logic 
// functions, and any output files from any of the foregoing 
// (including device programming or simulation files), and any 
// associated documentation or information are expressly subject 
// to the terms and conditions of the Altera Program License 
// Subscription Agreement, Altera MegaCore Function License 
// Agreement, or other applicable license agreement, including, 
// without limitation, that your use is for the sole purpose of 
// programming logic devices manufactured by Altera and sold by 
// Altera or its authorized distributors.  Please refer to the 
// applicable agreement for further details.


// 
// Device: Altera EPM7128SLC84-6 Package PLCC84
// 

// 
// This SDF file should be used for ModelSim-Altera (VHDL) only
// 

(DELAYFILE
  (SDFVERSION "2.1")
  (DESIGN "threelift")
  (DATE "07/03/2007 15:39:23")
  (VENDOR "Altera")
  (PROGRAM "Quartus II")
  (VERSION "Version 7.0 Build 33 02/05/2007 SJ Full Version")
  (DIVIDER .)
  (TIMESCALE 1 ps)

  (CELL
    (CELLTYPE "max_asynch_io")
    (INSTANCE \\clk\~I\\.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio dataout (1600:1600:1600) (1600:1600:1600))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_io")
    (INSTANCE \\f1upbutton\~I\\.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio dataout (200:200:200) (200:200:200))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_io")
    (INSTANCE \\f2dnbutton\~I\\.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio dataout (200:200:200) (200:200:200))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_io")
    (INSTANCE \\reset\~I\\.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio dataout (200:200:200) (200:200:200))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\mylift\.state_bit_0\~267_I\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (1600:1600:1600) (1600:1600:1600))
        (PORT pterm1[1] (1600:1600:1600) (1600:1600:1600))
        (PORT pterm1[2] (1600:1600:1600) (1600:1600:1600))
        (PORT pterm1[3] (1600:1600:1600) (1600:1600:1600))
        (IOPATH pterm1[0] pexpout (3000:3000:3000) (3000:3000:3000))
        (IOPATH pterm1[1] pexpout (3000:3000:3000) (3000:3000:3000))
        (IOPATH pterm1[2] pexpout (3000:3000:3000) (3000:3000:3000))
        (IOPATH pterm1[3] pexpout (3000:3000:3000) (3000:3000:3000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_io")
    (INSTANCE \\stop1button\~I\\.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio dataout (200:200:200) (200:200:200))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_io")
    (INSTANCE \\stop2button\~I\\.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio dataout (200:200:200) (200:200:200))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_io")
    (INSTANCE \\stop3button\~I\\.asynch_inst)
    (DELAY
      (ABSOLUTE
        (IOPATH padio dataout (200:200:200) (200:200:200))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\stoplight\~227_I\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (1500:1500:1500) (1500:1500:1500))
        (PORT pterm1[1] (1500:1500:1500) (1500:1500:1500))
        (PORT pterm2[0] (1700:1700:1700) (1700:1700:1700))
        (PORT pterm3[0] (1700:1700:1700) (1700:1700:1700))
        (IOPATH pterm1[0] combout (4000:4000:4000) (4000:4000:4000))
        (IOPATH pterm1[1] combout (4000:4000:4000) (4000:4000:4000))
        (IOPATH pterm2[0] combout (4000:4000:4000) (4000:4000:4000))
        (IOPATH pterm3[0] combout (4000:4000:4000) (4000:4000:4000))
      )
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\u1\|cnt2_rtl_1\|dffs\[0\]\~I\\.pcom)
    (DELAY
      (ABSOLUTE
        (IOPATH fbkin regin (4400:4400:4400) (4400:4400:4400))
      )
    )
  )
  (CELL
    (CELLTYPE "max_mcell_register")
    (INSTANCE \\u1\|cnt2_rtl_1\|dffs\[0\]\~I\\.preg)
    (DELAY
      (ABSOLUTE
        (PORT clk (600:600:600) (600:600:600))
        (IOPATH (posedge clk) regout (1400:1400:1400) (1400:1400:1400))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (1000:1000:1000))
      (HOLD datain (posedge clk) (1700:1700:1700))
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\u1\|cnt2_rtl_1\|dffs\[1\]\~I\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (1500:1500:1500) (1500:1500:1500))
        (IOPATH pterm1[0] regin (3000:3000:3000) (3000:3000:3000))
        (IOPATH fbkin regin (4400:4400:4400) (4400:4400:4400))
      )
    )
  )
  (CELL
    (CELLTYPE "max_mcell_register")
    (INSTANCE \\u1\|cnt2_rtl_1\|dffs\[1\]\~I\\.preg)
    (DELAY
      (ABSOLUTE
        (PORT clk (600:600:600) (600:600:600))
        (IOPATH (posedge clk) regout (1400:1400:1400) (1400:1400:1400))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (1000:1000:1000))
      (HOLD datain (posedge clk) (1700:1700:1700))
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\u1\|cnt2_rtl_1\|dffs\[2\]\~I\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (1500:1500:1500) (1500:1500:1500))
        (PORT pterm1[1] (1500:1500:1500) (1500:1500:1500))
        (IOPATH pterm1[0] regin (3000:3000:3000) (3000:3000:3000))
        (IOPATH pterm1[1] regin (3000:3000:3000) (3000:3000:3000))
        (IOPATH fbkin regin (4400:4400:4400) (4400:4400:4400))
      )
    )
  )
  (CELL
    (CELLTYPE "max_mcell_register")
    (INSTANCE \\u1\|cnt2_rtl_1\|dffs\[2\]\~I\\.preg)
    (DELAY
      (ABSOLUTE
        (PORT clk (600:600:600) (600:600:600))
        (IOPATH (posedge clk) regout (1400:1400:1400) (1400:1400:1400))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (1000:1000:1000))
      (HOLD datain (posedge clk) (1700:1700:1700))
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\u1\|cnt2_rtl_1\|dffs\[3\]\~I\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (1500:1500:1500) (1500:1500:1500))
        (PORT pterm1[1] (1500:1500:1500) (1500:1500:1500))
        (PORT pterm1[2] (1500:1500:1500) (1500:1500:1500))
        (IOPATH pterm1[0] regin (3000:3000:3000) (3000:3000:3000))
        (IOPATH pterm1[1] regin (3000:3000:3000) (3000:3000:3000))
        (IOPATH pterm1[2] regin (3000:3000:3000) (3000:3000:3000))
        (IOPATH fbkin regin (4400:4400:4400) (4400:4400:4400))
      )
    )
  )
  (CELL
    (CELLTYPE "max_mcell_register")
    (INSTANCE \\u1\|cnt2_rtl_1\|dffs\[3\]\~I\\.preg)
    (DELAY
      (ABSOLUTE
        (PORT clk (600:600:600) (600:600:600))
        (IOPATH (posedge clk) regout (1400:1400:1400) (1400:1400:1400))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (1000:1000:1000))
      (HOLD datain (posedge clk) (1700:1700:1700))
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\u1\|cnt2_rtl_1\|dffs\[4\]\~I\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (1500:1500:1500) (1500:1500:1500))
        (PORT pterm1[1] (1500:1500:1500) (1500:1500:1500))
        (PORT pterm1[2] (1500:1500:1500) (1500:1500:1500))
        (PORT pterm1[3] (1500:1500:1500) (1500:1500:1500))
        (IOPATH pterm1[0] regin (3000:3000:3000) (3000:3000:3000))
        (IOPATH pterm1[1] regin (3000:3000:3000) (3000:3000:3000))
        (IOPATH pterm1[2] regin (3000:3000:3000) (3000:3000:3000))
        (IOPATH pterm1[3] regin (3000:3000:3000) (3000:3000:3000))
        (IOPATH fbkin regin (4400:4400:4400) (4400:4400:4400))
      )
    )
  )
  (CELL
    (CELLTYPE "max_mcell_register")
    (INSTANCE \\u1\|cnt2_rtl_1\|dffs\[4\]\~I\\.preg)
    (DELAY
      (ABSOLUTE
        (PORT clk (600:600:600) (600:600:600))
        (IOPATH (posedge clk) regout (1400:1400:1400) (1400:1400:1400))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (1000:1000:1000))
      (HOLD datain (posedge clk) (1700:1700:1700))
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\u1\|cnt2_rtl_1\|dffs\[5\]\~I\\.pcom)
    (DELAY
      (ABSOLUTE
        (PORT pterm1[0] (1500:1500:1500) (1500:1500:1500))
        (PORT pterm1[1] (1500:1500:1500) (1500:1500:1500))
        (PORT pterm1[2] (1500:1500:1500) (1500:1500:1500))
        (PORT pterm1[3] (1500:1500:1500) (1500:1500:1500))
        (PORT pterm1[4] (1500:1500:1500) (1500:1500:1500))
        (IOPATH pterm1[0] regin (3000:3000:3000) (3000:3000:3000))
        (IOPATH pterm1[1] regin (3000:3000:3000) (3000:3000:3000))
        (IOPATH pterm1[2] regin (3000:3000:3000) (3000:3000:3000))
        (IOPATH pterm1[3] regin (3000:3000:3000) (3000:3000:3000))
        (IOPATH pterm1[4] regin (3000:3000:3000) (3000:3000:3000))
        (IOPATH fbkin regin (4400:4400:4400) (4400:4400:4400))
      )
    )
  )
  (CELL
    (CELLTYPE "max_mcell_register")
    (INSTANCE \\u1\|cnt2_rtl_1\|dffs\[5\]\~I\\.preg)
    (DELAY
      (ABSOLUTE
        (PORT clk (600:600:600) (600:600:600))
        (IOPATH (posedge clk) regout (1400:1400:1400) (1400:1400:1400))
      )
    )
    (TIMINGCHECK
      (SETUP datain (posedge clk) (1000:1000:1000))
      (HOLD datain (posedge clk) (1700:1700:1700))
    )
  )
  (CELL
    (CELLTYPE "max_asynch_mcell")
    (INSTANCE \\u1\|cnt2_rtl_1\|dffs\[6\]\~I\\.pcom)
    (DELAY
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💿 文件大小 396 K
👤 上传用户 cnnotes
📂 所属分类 VHDL/FPGA/Verilog
🏷️ 相关标签

#QuartusII #VHDL #仿真实现 #电梯控制器
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