lift.tan.summary

在QuartusII里用VHDL仿真实现电梯控制器

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : -2.400 ns
From           : reset
To             : doorlight~reg0
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 15.700 ns
From           : udsig
To             : upsiglight
From Clock     : clk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 5.400 ns
From           : f2dnbutton
To             : fdnlight[2]~reg0
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : 77.52 MHz ( period = 12.900 ns )
From           : stoplight[1]~reg0
To             : mylift.state_bit_1
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 0

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