📄 lift.map.rpt
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; Registers Removed During Synthesis ;
+----------------------------------------+----------------------------------------+
; Register name ; Reason for Removal ;
+----------------------------------------+----------------------------------------+
; u2/segout[1] ; Stuck at VCC due to stuck port data_in ;
; u2/segout[5] ; Stuck at GND due to stuck port data_in ;
; fuplight[3]~reg0 ; Stuck at GND due to stuck port data_in ;
; fdnlight[1]~reg0 ; Stuck at GND due to stuck port data_in ;
; u2/segout[6] ; Merged with u2/segout[0] ;
; u2/segout[3] ; Merged with u2/segout[0] ;
; u1/cnt1_rtl_0/dffs[0] ; Merged with u1/cnt2_rtl_1/dffs[0] ;
; u1/cnt1_rtl_0/dffs[1] ; Merged with u1/cnt2_rtl_1/dffs[1] ;
; u1/cnt1_rtl_0/dffs[2] ; Merged with u1/cnt2_rtl_1/dffs[2] ;
; u1/cnt1_rtl_0/dffs[3] ; Merged with u1/cnt2_rtl_1/dffs[3] ;
; u1/cnt1_rtl_0/dffs[4] ; Merged with u1/cnt2_rtl_1/dffs[4] ;
; u1/cnt1_rtl_0/dffs[5] ; Merged with u1/cnt2_rtl_1/dffs[5] ;
; u1/cnt1_rtl_0/dffs[6] ; Merged with u1/cnt2_rtl_1/dffs[6] ;
; u1/cnt1_rtl_0/dffs[7] ; Merged with u1/cnt2_rtl_1/dffs[7] ;
; u1/cnt1_rtl_0/dffs[8] ; Merged with u1/cnt2_rtl_1/dffs[8] ;
; u1/cnt1_rtl_0/dffs[9] ; Merged with u1/cnt2_rtl_1/dffs[9] ;
; u1/cnt1_rtl_0/dffs[10] ; Merged with u1/cnt2_rtl_1/dffs[10] ;
; u1/cnt1_rtl_0/dffs[11] ; Merged with u1/cnt2_rtl_1/dffs[11] ;
; u1/cnt1_rtl_0/dffs[12] ; Merged with u1/cnt2_rtl_1/dffs[12] ;
; u1/cnt1_rtl_0/dffs[13] ; Merged with u1/cnt2_rtl_1/dffs[13] ;
; u1/cnt1_rtl_0/dffs[14] ; Merged with u1/cnt2_rtl_1/dffs[14] ;
; u1/cnt1_rtl_0/dffs[15] ; Merged with u1/cnt2_rtl_1/dffs[15] ;
; Total Number of Removed Registers = 22 ; ;
+----------------------------------------+----------------------------------------+
+--------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: fen:u1|lpm_counter:cnt1_rtl_0 ;
+------------------------+-------------------+-----------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------+-------------------+-----------------------------------+
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; LPM_WIDTH ; 23 ; Untyped ;
; LPM_DIRECTION ; UP ; Untyped ;
; LPM_MODULUS ; 0 ; Untyped ;
; LPM_AVALUE ; UNUSED ; Untyped ;
; LPM_SVALUE ; UNUSED ; Untyped ;
; LPM_PORT_UPDOWN ; PORT_CONNECTIVITY ; Untyped ;
; DEVICE_FAMILY ; MAX7000S ; Untyped ;
; CARRY_CHAIN ; MANUAL ; Untyped ;
; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
; CARRY_CNT_EN ; SMART ; Untyped ;
; LABWIDE_SCLR ; ON ; Untyped ;
; USE_NEW_VERSION ; TRUE ; Untyped ;
; CBXI_PARAMETER ; NOTHING ; Untyped ;
+------------------------+-------------------+-----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+--------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: fen:u1|lpm_counter:cnt2_rtl_1 ;
+------------------------+-------------------+-----------------------------------+
; Parameter Name ; Value ; Type ;
+------------------------+-------------------+-----------------------------------+
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; LPM_WIDTH ; 16 ; Untyped ;
; LPM_DIRECTION ; UP ; Untyped ;
; LPM_MODULUS ; 0 ; Untyped ;
; LPM_AVALUE ; UNUSED ; Untyped ;
; LPM_SVALUE ; UNUSED ; Untyped ;
; LPM_PORT_UPDOWN ; PORT_CONNECTIVITY ; Untyped ;
; DEVICE_FAMILY ; MAX7000S ; Untyped ;
; CARRY_CHAIN ; MANUAL ; Untyped ;
; CARRY_CHAIN_LENGTH ; 48 ; CARRY_CHAIN_LENGTH ;
; NOT_GATE_PUSH_BACK ; ON ; NOT_GATE_PUSH_BACK ;
; CARRY_CNT_EN ; SMART ; Untyped ;
; LABWIDE_SCLR ; ON ; Untyped ;
; USE_NEW_VERSION ; TRUE ; Untyped ;
; CBXI_PARAMETER ; NOTHING ; Untyped ;
+------------------------+-------------------+-----------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
Info: Version 7.0 Build 33 02/05/2007 SJ Full Version
Info: Processing started: Tue Jul 03 15:38:32 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off lift -c lift
Info: Found 2 design units, including 1 entities, in source file threelift.vhd
Info: Found design unit 1: threelift-art
Info: Found entity 1: threelift
Info: Found 2 design units, including 1 entities, in source file fen.vhd
Info: Found design unit 1: fen-art
Info: Found entity 1: fen
Info: Found 2 design units, including 1 entities, in source file disp.vhd
Info: Found design unit 1: disp-art
Info: Found entity 1: disp
Info: Elaborating entity "threelift" for the top level hierarchy
Info: Elaborating entity "fen" for hierarchy "fen:u1"
Info: Elaborating entity "disp" for hierarchy "disp:u2"
Info: Power-up level of register "disp:u2|segout[1]" is not specified -- using power-up level of High to minimize register
Warning: Reduced register "disp:u2|segout[1]" with stuck data_in port to stuck value VCC
Warning: Reduced register "disp:u2|segout[5]" with stuck data_in port to stuck value GND
Warning: Reduced register "fuplight[3]~reg0" with stuck data_in port to stuck value GND
Warning: Reduced register "fdnlight[1]~reg0" with stuck data_in port to stuck value GND
Info: Inferred 2 megafunctions from design logic
Info: Inferred lpm_counter megafunction (LPM_WIDTH=23) from the following logic: "fen:u1|cnt1[0]~0"
Info: Inferred lpm_counter megafunction (LPM_WIDTH=16) from the following logic: "fen:u1|cnt2[0]~0"
Info: Found 1 design units, including 1 entities, in source file g:/altera/70/quartus/libraries/megafunctions/lpm_counter.tdf
Info: Found entity 1: lpm_counter
Info: Elaborated megafunction instantiation "fen:u1|lpm_counter:cnt1_rtl_0"
Info: Elaborated megafunction instantiation "fen:u1|lpm_counter:cnt2_rtl_1"
Info: State machine "|threelift|mylift" contains 10 states
Info: Selected Auto state machine encoding method for state machine "|threelift|mylift"
Info: Encoding result for state machine "|threelift|mylift"
Info: Completed encoding using 4 state bits
Info: Encoded state bit "mylift.state_bit_3"
Info: Encoded state bit "mylift.state_bit_2"
Info: Encoded state bit "mylift.state_bit_1"
Info: Encoded state bit "mylift.state_bit_0"
Info: State "|threelift|mylift.stopon1" uses code string "0000"
Info: State "|threelift|mylift.dooropen" uses code string "0010"
Info: State "|threelift|mylift.doorclose" uses code string "1000"
Info: State "|threelift|mylift.doorwait1" uses code string "0001"
Info: State "|threelift|mylift.doorwait2" uses code string "0011"
Info: State "|threelift|mylift.doorwait3" uses code string "0100"
Info: State "|threelift|mylift.doorwait4" uses code string "0101"
Info: State "|threelift|mylift.up" uses code string "1001"
Info: State "|threelift|mylift.down" uses code string "1010"
Info: State "|threelift|mylift.stop" uses code string "0110"
Info: Duplicate registers merged to single register
Info: Duplicate register "disp:u2|segout[6]" merged to single register "disp:u2|segout[0]"
Info: Duplicate register "disp:u2|segout[3]" merged to single register "disp:u2|segout[0]"
Info: Duplicate register "fen:u1|lpm_counter:cnt1_rtl_0|dffs[0]" merged to single register "fen:u1|lpm_counter:cnt2_rtl_1|dffs[0]"
Info: Duplicate register "fen:u1|lpm_counter:cnt1_rtl_0|dffs[1]" merged to single register "fen:u1|lpm_counter:cnt2_rtl_1|dffs[1]"
Info: Duplicate registers merged to single register
Info: Duplicate register "fen:u1|lpm_counter:cnt1_rtl_0|dffs[2]" merged to single register "fen:u1|lpm_counter:cnt2_rtl_1|dffs[2]"
Info: Duplicate register "fen:u1|lpm_counter:cnt1_rtl_0|dffs[3]" merged to single register "fen:u1|lpm_counter:cnt2_rtl_1|dffs[3]"
Info: Duplicate register "fen:u1|lpm_counter:cnt1_rtl_0|dffs[4]" merged to single register "fen:u1|lpm_counter:cnt2_rtl_1|dffs[4]"
Info: Duplicate register "fen:u1|lpm_counter:cnt1_rtl_0|dffs[5]" merged to single register "fen:u1|lpm_counter:cnt2_rtl_1|dffs[5]"
Info: Duplicate register "fen:u1|lpm_counter:cnt1_rtl_0|dffs[6]" merged to single register "fen:u1|lpm_counter:cnt2_rtl_1|dffs[6]"
Info: Duplicate register "fen:u1|lpm_counter:cnt1_rtl_0|dffs[7]" merged to single register "fen:u1|lpm_counter:cnt2_rtl_1|dffs[7]"
Info: Duplicate register "fen:u1|lpm_counter:cnt1_rtl_0|dffs[8]" merged to single register "fen:u1|lpm_counter:cnt2_rtl_1|dffs[8]"
Info: Duplicate register "fen:u1|lpm_counter:cnt1_rtl_0|dffs[9]" merged to single register "fen:u1|lpm_counter:cnt2_rtl_1|dffs[9]"
Info: Duplicate register "fen:u1|lpm_counter:cnt1_rtl_0|dffs[10]" merged to single register "fen:u1|lpm_counter:cnt2_rtl_1|dffs[10]"
Info: Duplicate register "fen:u1|lpm_counter:cnt1_rtl_0|dffs[11]" merged to single register "fen:u1|lpm_counter:cnt2_rtl_1|dffs[11]"
Info: Duplicate register "fen:u1|lpm_counter:cnt1_rtl_0|dffs[12]" merged to single register "fen:u1|lpm_counter:cnt2_rtl_1|dffs[12]"
Info: Duplicate register "fen:u1|lpm_counter:cnt1_rtl_0|dffs[13]" merged to single register "fen:u1|lpm_counter:cnt2_rtl_1|dffs[13]"
Info: Duplicate register "fen:u1|lpm_counter:cnt1_rtl_0|dffs[14]" merged to single register "fen:u1|lpm_counter:cnt2_rtl_1|dffs[14]"
Info: Duplicate register "fen:u1|lpm_counter:cnt1_rtl_0|dffs[15]" merged to single register "fen:u1|lpm_counter:cnt2_rtl_1|dffs[15]"
Warning: Output pins are stuck at VCC or GND
Warning: Pin "fuplight[3]" stuck at GND
Warning: Pin "fdnlight[1]" stuck at GND
Warning: Pin "seg[1]" stuck at VCC
Warning: Pin "seg[5]" stuck at GND
Info: Promoted pin-driven signal(s) to global signal
Info: Promoted clock signal driven by pin "clk" to global clock signal
Info: Implemented 101 device resources after synthesis - the final resource count might be different
Info: Implemented 9 input pins
Info: Implemented 19 output pins
Info: Implemented 68 macrocells
Info: Implemented 5 shareable expanders
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 9 warnings
Info: Allocated 139 megabytes of memory during processing
Info: Processing ended: Tue Jul 03 15:38:47 2007
Info: Elapsed time: 00:00:15
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