fen.vhd

来自「在QuartusII里用VHDL仿真实现电梯控制器」· VHDL 代码 · 共 31 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

entity fen is
  port(clk : in std_logic;   --10MHz信号
       clk_1Hz,clk_100Hz : out std_logic);
end entity;

architecture art of fen is
    signal ck1,ck2 : std_logic; 
  begin 
  process(clk)
  variable cnt1 : integer range 0 to 6_000_000;
  variable cnt2 : integer range 0 to 60_000;
    begin
    if clk'event and clk='1' then
       if cnt1=6000000 then
          ck1<=not ck1;
       end if;
       if cnt2=60000 then
          ck2<=not ck2;
       end if;  
       cnt1:=cnt1+1;
       cnt2:=cnt2+1;
    end if;      
  end process;
  clk_1Hz<=ck1;
  clk_100Hz<=ck2;
end art;