disp.vhd

来自「智能化微机测量和控制技术的迅速发展和广泛应用己经渗透到国民经济的各个部门。不但国」· VHDL 代码 · 共 31 行

----该模块为4线—七段译码器
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library ieee; 
use ieee.std_logic_1164.all; 
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entity disp is 
port(d:in std_logic_vector(3 downto 0); 
q:out std_logic_vector(6 downto 0)); 
end disp; 
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architecture disp_arc of disp is 
begin 
process(d) 
begin 
case d is 
when "0000"=>q<="0111111";   --0
when "0001"=>q<="0000110";   --1
when "0010"=>q<="1011011";   --2
when "0011"=>q<="1001111";   --3
when "0100"=>q<="1100110";   --4
when "0101"=>q<="1101101";   --5
when "0110"=>q<="1111101";   --6
when "0111"=>q<="0100111";   --7
when "1000"=>q<="1111111";   --8
when "1001"=>q<="1101111";   --9
when others=>q<="0000000"; 
end case; 
end process; 
end disp_arc;