fen.vhd

来自「智能化微机测量和控制技术的迅速发展和广泛应用己经渗透到国民经济的各个部门。不但国」· VHDL 代码 · 共 32 行

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library ieee;
use ieee.std_logic_1164.all;

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entity fen is
port (clk:in std_logic;
     clk1:out std_logic);
end fen;

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architecture fen_arc of fen is
begin
     process (clk)
       variable cnt : integer range 0 to 120;
    begin 
     if clk'event and clk='1' then  ---输入时钟频率12kHz，
                 if cnt=120 then
                       cnt:=0;      ---120个时钟频率记一次数
                       clk1<='1';   ---输出时钟频率为100Hz
                else
                cnt:=cnt+1;
                clk1<='0';
                end if ;
     end if ;
   end process ;
end fen_arc ;