📄 test_cntr4.ant
字号:
////////////////////////////////////////////////////////////////////////////////
// Copyright (c) 1995-2003 Xilinx, Inc.
// All Right Reserved.
////////////////////////////////////////////////////////////////////////////////
// ____ ____
// / /\/ /
// /___/ \ / Vendor: Xilinx
// \ \ \/ Version : 7.1.04i
// \ \ Application : ISE Foundation
// / / Filename : test_cntr4.ant
// /___/ /\ Timestamp : Wed Feb 21 15:14:15 2007
// \ \ / \
// \___\/\___\
//
//Command:
//Design Name: test_cntr4
//Device: Xilinx
//
`timescale 1ns/1ps
module test_cntr4;
reg clock = 1'b0;
reg reset = 1'b1;
wire [3:0] count;
parameter PERIOD = 200;
parameter real DUTY_CYCLE = 0.5;
parameter OFFSET = 0;
initial // Clock process for clock
begin
#OFFSET;
forever
begin
clock = 1'b0;
#(PERIOD-(PERIOD*DUTY_CYCLE)) clock = 1'b1;
#(PERIOD*DUTY_CYCLE);
end
end
cntr4 UUT (
.clock(clock),
.reset(reset),
.count(count));
integer TX_FILE = 0;
integer TX_ERROR = 0;
initial begin // Annotation process for clock clock
#0;
ANNOTATE_count;
#OFFSET;
forever begin
#115;
ANNOTATE_count;
#85;
end
end
initial begin // Open the annotations file...
TX_FILE = $fopen("\\\\pimlico\\epie1\\pdrive_labs\\en518_2007\\PWM\\test_cntr4.ano");
#5200 // Final time: 5200 ns
$display("Success! Annotation Simulation Complete.");
$fdisplay(TX_FILE, "Total[%d]", TX_ERROR);
$fclose(TX_FILE);
$finish;
end
initial begin
// ------------- Current Time: 285ns
#285;
reset = 1'b0;
// -------------------------------------
// ------------- Current Time: 3485ns
#3200;
reset = 1'b1;
// -------------------------------------
// ------------- Current Time: 3685ns
#200;
reset = 1'b0;
// -------------------------------------
end
task ANNOTATE_count;
#0 begin
$fdisplay(TX_FILE, "Annotate[%d,count,%b]", $time, count);
$fflush(TX_FILE);
TX_ERROR = TX_ERROR + 1;
end
endtask
endmodule
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -