📄 test_mag4comp.v
字号:
`timescale 1ns / 1ps
module test_mag4comp_v;
// Inputs
reg [3:0] a;
reg [3:0] b;
reg aeqbin;
reg agtbin;
reg altbin;
// Outputs
wire aeqbout;
wire agtbout;
wire altbout;
// Instantiate the Unit Under Test (UUT)
mag4comp uut (
.a(a),
.b(b),
.aeqbin(aeqbin),
.agtbin(agtbin),
.altbin(altbin),
.aeqbout(aeqbout),
.agtbout(agtbout),
.altbout(altbout)
);
initial begin
// Initialize Inputs
a = 0;
b = 0;
aeqbin = 0;
agtbin = 0;
altbin = 0;
// Wait 100 ns for global reset to finish
#100;
// Add stimulus here
aeqbin = 1'b1;
#100;
a = 4'b1100;
#100;
b = 4'b1101;
#100;
a = 4'b1001;
#100;
b = 4'b1001;
#100;
agtbin = 1'b1;
aeqbin = 1'b0;
#100;
agtbin = 1'b0;
altbin = 1'b1;
#100;
$stop;
end
endmodule
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -