hmb_max.tan.rpt

来自「ALTERA Nios II Embedded Evaluation Kit开发」· RPT 代码 · 共 316 行 · 第 1/5 页

RPT
316 行
字号
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; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_RGB[7]              ; VGA_DATA_DECODE:u1|VGA_R[7]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.957 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d3_RGB[6]              ; VGA_DATA_DECODE:u1|VGA_B[6]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.952 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_RGB[1]              ; VGA_DATA_DECODE:u1|d3_RGB[1]              ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.950 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_RGB[1]              ; VGA_DATA_DECODE:u1|VGA_G[1]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.946 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_RGB[9]              ; VGA_DATA_DECODE:u1|VGA_R[9]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.945 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_RGB[1]              ; VGA_DATA_DECODE:u1|d2_RGB[1]              ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.942 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_RGB[3]              ; VGA_DATA_DECODE:u1|d3_RGB[3]              ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.942 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_RGB[3]              ; VGA_DATA_DECODE:u1|VGA_G[3]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.941 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_RGB[9]              ; VGA_DATA_DECODE:u1|d2_RGB[9]              ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.941 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_RGB[7]              ; VGA_DATA_DECODE:u1|VGA_G[7]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.935 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_RGB[3]              ; VGA_DATA_DECODE:u1|d2_RGB[3]              ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.934 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d3_RGB[2]              ; VGA_DATA_DECODE:u1|VGA_B[2]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.934 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_VS                  ; VGA_DATA_DECODE:u1|d3_VS                  ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.931 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_BLANK               ; VGA_DATA_DECODE:u1|d3_BLANK               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.929 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_HS                  ; VGA_DATA_DECODE:u1|d2_HS                  ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.929 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_RGB[9]              ; VGA_DATA_DECODE:u1|VGA_G[9]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.929 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d3_RGB[5]              ; VGA_DATA_DECODE:u1|VGA_B[5]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.929 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_RGB[5]              ; VGA_DATA_DECODE:u1|VGA_G[5]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.928 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_RGB[4]              ; VGA_DATA_DECODE:u1|d2_RGB[4]              ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.795 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_RGB[4]              ; VGA_DATA_DECODE:u1|VGA_R[4]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.792 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_RGB[4]              ; VGA_DATA_DECODE:u1|VGA_G[4]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.792 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_RGB[4]              ; VGA_DATA_DECODE:u1|d3_RGB[4]              ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.791 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_RGB[0]              ; VGA_DATA_DECODE:u1|d3_RGB[0]              ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.788 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_RGB[0]              ; VGA_DATA_DECODE:u1|VGA_G[0]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.787 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d3_RGB[4]              ; VGA_DATA_DECODE:u1|VGA_B[4]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.787 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_RGB[8]              ; VGA_DATA_DECODE:u1|d3_RGB[8]              ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.785 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_RGB[8]              ; VGA_DATA_DECODE:u1|VGA_G[8]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.782 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_RGB[8]              ; VGA_DATA_DECODE:u1|d2_RGB[8]              ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.782 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_RGB[8]              ; VGA_DATA_DECODE:u1|VGA_R[8]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.781 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_RGB[5]              ; VGA_DATA_DECODE:u1|VGA_R[5]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.780 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_RGB[6]              ; VGA_DATA_DECODE:u1|VGA_R[6]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.778 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_RGB[5]              ; VGA_DATA_DECODE:u1|d2_RGB[5]              ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.777 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_RGB[6]              ; VGA_DATA_DECODE:u1|d2_RGB[6]              ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.777 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_RGB[2]              ; VGA_DATA_DECODE:u1|d3_RGB[2]              ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.777 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_RGB[2]              ; VGA_DATA_DECODE:u1|VGA_G[2]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.776 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d3_RGB[1]              ; VGA_DATA_DECODE:u1|VGA_B[1]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.775 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d3_RGB[8]              ; VGA_DATA_DECODE:u1|VGA_B[8]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.775 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_RGB[2]              ; VGA_DATA_DECODE:u1|d2_RGB[2]              ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.773 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d3_RGB[0]              ; VGA_DATA_DECODE:u1|VGA_B[0]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.772 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d3_RGB[3]              ; VGA_DATA_DECODE:u1|VGA_B[3]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.771 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_RGB[0]              ; VGA_DATA_DECODE:u1|d2_RGB[0]              ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.770 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d3_RGB[7]              ; VGA_DATA_DECODE:u1|VGA_B[7]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.770 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d3_RGB[9]              ; VGA_DATA_DECODE:u1|VGA_B[9]               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.769 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_BLANK               ; VGA_DATA_DECODE:u1|d2_BLANK               ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.766 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d2_HS                  ; VGA_DATA_DECODE:u1|d3_HS                  ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.765 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; VGA_DATA_DECODE:u1|d1_VS                  ; VGA_DATA_DECODE:u1|d2_VS                  ; HC_VGA_CLOCK ; HC_VGA_CLOCK ; None                        ; None                      ; 0.763 ns                ;

+-------+------------------------------------------------+-------------------------------------------+-------------------------------------------+--------------+--------------+-----------------------------+---------------------------+-------------------------+





+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+

; Clock Setup: 'HC_NCLK'                                                                                                                                                                                                                                     ;

+-------+------------------------------------------------+-------------------------------------------+-------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+

; Slack ; Actual fmax (period)                           ; From                                      ; To                                        ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;

+-------+------------------------------------------------+-------------------------------------------+-------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+

; N/A   ; 302.30 MHz ( period = 3.308 ns )               ; LCD_DATA_DECODE:u3|color_phase_counter[0] ; LCD_DATA_DECODE:u3|LCD_G[4]               ; HC_NCLK    ; HC_NCLK  ; None                        ; None                      ; 2.865 ns                ;

; N/A   ; 302.30 MHz ( period = 3.308 ns )               ; LCD_DATA_DECODE:u3|color_phase_counter[0] ; LCD_DATA_DECODE:u3|LCD_G[5]               ; HC_NCLK    ; HC_NCLK  ; None                        ; None                      ; 2.865 ns                ;

; N/A   ; 302.30 MHz ( period = 3.308 ns )               ; LCD_DATA_DECODE:u3|color_phase_counter[0] ; LCD_DATA_DECODE:u3|LCD_B[4]               ; HC_NCLK    ; HC_NCLK  ; None                        ; None                      ; 2.865 ns                ;

; N/A   ; 302.30 MHz ( period = 3.308 ns )               ; LCD_DATA_DECODE:u3|color_phase_counter[0] ; LCD_DATA_DECODE:u3|LCD_B[5]               ; HC_NCLK    ; HC_NCLK  ; None                        ; None                      ; 2.865 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; LCD_DATA_DECODE:u3|color_phase_counter[0] ; LCD_DATA_DECODE:u3|LCD_B[7]               ; HC_NCLK    ; HC_NCLK  ; None                        ; None                      ; 2.819 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; LCD_DATA_DECODE:u3|color_phase_counter[0] ; LCD_DATA_DECODE:u3|LCD_VD                 ; HC_NCLK    ; HC_NCLK  ; None                        ; None                      ; 2.819 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; LCD_DATA_DECODE:u3|color_phase_counter[0] ; LCD_DATA_DECODE:u3|LCD_DEN                ; HC_NCLK    ; HC_NCLK  ; None                        ; None                      ; 2.819 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; LCD_DATA_DECODE:u3|color_phase_counter[0] ; LCD_DATA_DECODE:u3|LCD_G[0]               ; HC_NCLK    ; HC_NCLK  ; None                        ; None                      ; 2.762 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; LCD_DATA_DECODE:u3|color_phase_counter[0] ; LCD_DATA_DECODE:u3|LCD_G[1]               ; HC_NCLK    ; HC_NCLK  ; None                        ; None                      ; 2.762 ns                ;

; N/A   ; Restricted to 304.04 MHz ( period = 3.289 ns ) ; LCD_DATA_DECODE:u3|color_phase_counter[0] ; LCD_DATA_DECODE:u3|LCD_B[0]               ; HC_NCLK    ; HC_NCLK  ; None                        ; None                      ; 2.762 ns                ;
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hmb_max.tan.rpt - 源码说明

本页面展示了「ALTERA Nios II Embedded Evaluation Kit开发板制造商(terasic)提供的多媒体显示板（Terasic Multimedia Touch Panel Daugh」中的 hmb_max.tan.rpt 源码文件，采用 RPT 编程语言编写，共 316 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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