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📄 spc.fit.eqn

📁 Alera 的8051 IP core的示例文件5个
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--R1_state.x_stop is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|state.x_stop at LCFF_X9_Y7_N21
R1_state.x_stop = DFFEAS(R1L6, GLOBAL(Q1L40), RST,  ,  ,  ,  ,  ,  );


--R1_partoser[0] is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|partoser[0] at LCFF_X10_Y8_N17
R1_partoser[0] = DFFEAS(R1L29, GLOBAL(Q1L40), RST,  , R1L17,  ,  ,  ,  );


--R1_state.x_shift is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|state.x_shift at LCFF_X10_Y7_N3
R1_state.x_shift = DFFEAS(R1L43, GLOBAL(Q1L40), RST,  ,  ,  ,  ,  ,  );


--R1_state.x_wait is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|state.x_wait at LCFF_X9_Y7_N29
R1_state.x_wait = DFFEAS(R1L10, GLOBAL(Q1L40), RST,  ,  ,  ,  ,  ,  );


--R1L50 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|txd~30 at LCCOMB_X10_Y7_N6
R1L50 = R1_state.x_wait # R1_state.x_shift;


--R1_state.x_idle is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|state.x_idle at LCFF_X10_Y7_N23
R1_state.x_idle = DFFEAS(R1L40, GLOBAL(Q1L40), RST,  ,  ,  ,  ,  ,  );


--R1L51 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|txd~31 at LCCOMB_X10_Y7_N0
R1L51 = R1_state.x_stop # R1_partoser[0] & R1L50 # !R1_state.x_idle;


--S1__clk0 is PLL20:inst4|altpll:altpll_component|_clk0 at PLL_1
S1__clk0 = PLL.CLK0(.ENA(), .CLKSWITCH(), .ARESET(), .PFDENA(), .INCLK(CLK), .INCLK());

--S1__clk1 is PLL20:inst4|altpll:altpll_component|_clk1 at PLL_1
S1__clk1 = PLL.CLK1(.ENA(), .CLKSWITCH(), .ARESET(), .PFDENA(), .INCLK(CLK), .INCLK());


--A1L9 is altera_internal_jtag~TDO at JTAG_X1_Y7_N0
A1L9 = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , L1L28);

--A1L10 is altera_internal_jtag~TMSUTAP at JTAG_X1_Y7_N0
A1L10 = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , L1L28);

--A1L7 is altera_internal_jtag~TCKUTAP at JTAG_X1_Y7_N0
A1L7 = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , L1L28);

--altera_internal_jtag is altera_internal_jtag at JTAG_X1_Y7_N0
altera_internal_jtag = CYCLONEII_ELA(altera_reserved_tms, altera_reserved_tck, altera_reserved_tdi, , , L1L28);


--R1_xmit_cmd_p is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xmit_cmd_p at LCFF_X9_Y7_N31
R1_xmit_cmd_p = DFFEAS(R1L102, GLOBAL(B1L1),  ,  ,  ,  ,  ,  ,  );


--R1_xcnt16[0] is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xcnt16[0] at LCFF_X9_Y7_N9
R1_xcnt16[0] = DFFEAS(R1L75, GLOBAL(Q1L40), RST,  ,  ,  ,  , R1L99,  );


--R1_xcnt16[2] is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xcnt16[2] at LCFF_X9_Y7_N13
R1_xcnt16[2] = DFFEAS(R1L85, GLOBAL(Q1L40), RST,  ,  ,  ,  , R1L99,  );


--R1_xcnt16[1] is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xcnt16[1] at LCFF_X9_Y7_N11
R1_xcnt16[1] = DFFEAS(R1L80, GLOBAL(Q1L40), RST,  ,  ,  ,  , R1L99,  );


--R1_xcnt16[3] is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xcnt16[3] at LCFF_X9_Y7_N15
R1_xcnt16[3] = DFFEAS(R1L90, GLOBAL(Q1L40), RST,  ,  ,  ,  , R1L99,  );


--R1_xcnt16[4] is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xcnt16[4] at LCFF_X9_Y7_N17
R1_xcnt16[4] = DFFEAS(R1L95, GLOBAL(Q1L40), RST,  ,  ,  ,  , R1L99,  );


--B1L4 is KX232:inst1|rtl~91 at LCCOMB_X9_Y7_N24
B1L4 = R1_xcnt16[1] & R1_xcnt16[3] & !R1_xcnt16[4] & R1_xcnt16[2];


--R1L5 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|next_state.x_stop~113~57 at LCCOMB_X9_Y7_N18
R1L5 = R1_state.x_stop & (R1_xmit_cmd_p # !B1L4 # !R1_xcnt16[0]);


--R1_xbitcnt[3] is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xbitcnt[3] at LCFF_X10_Y7_N19
R1_xbitcnt[3] = DFFEAS(R1L69, GLOBAL(Q1L40), RST,  ,  ,  ,  , R1L2,  );


--R1_xbitcnt[2] is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xbitcnt[2] at LCFF_X10_Y7_N17
R1_xbitcnt[2] = DFFEAS(R1L64, GLOBAL(Q1L40), RST,  ,  ,  ,  , R1L2,  );


--R1_xbitcnt[1] is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xbitcnt[1] at LCFF_X10_Y7_N15
R1_xbitcnt[1] = DFFEAS(R1L59, GLOBAL(Q1L40), RST,  ,  ,  ,  , R1L2,  );


--R1_xbitcnt[0] is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xbitcnt[0] at LCFF_X10_Y7_N13
R1_xbitcnt[0] = DFFEAS(R1L54, GLOBAL(Q1L40), RST,  ,  ,  ,  , R1L2,  );


--R1L7 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|next_state.x_stop~115~49 at LCCOMB_X10_Y7_N20
R1L7 = !R1_xbitcnt[0] & !R1_xbitcnt[1] & !R1_xbitcnt[2] & R1_xbitcnt[3];


--R1L8 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|next_state.x_wait~109~54 at LCCOMB_X9_Y7_N2
R1L8 = B1L4 & !R1_xcnt16[0];


--R1L6 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|next_state.x_stop~115~2 at LCCOMB_X9_Y7_N20
R1L6 = R1L5 # R1L7 & R1_state.x_wait & R1L8;


--Q1L40 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_baud:iBAUD|bclk_t~clkctrl at CLKCTRL_G0
Q1L40 = cycloneii_clkctrl(.INCLK[0] = Q1_bclk_t) WITH (clock_type = "Global Clock");


--R1_partoser[1] is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|partoser[1] at LCFF_X10_Y8_N1
R1_partoser[1] = DFFEAS(R1L30, GLOBAL(Q1L40), RST,  , R1L17,  ,  ,  ,  );


--N1_xdata[0] is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|xdata[0] at LCFF_X10_Y6_N13
N1_xdata[0] = DFFEAS(N1L23, GLOBAL(Q1L40),  ,  , N1L231,  ,  ,  ,  );


--R1L29 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|partoser~25 at LCCOMB_X10_Y8_N16
R1L29 = R1_xmit_cmd_p & (R1_state.x_idle & (R1_partoser[1]) # !R1_state.x_idle & N1_xdata[0]) # !R1_xmit_cmd_p & (R1_partoser[1]);


--R1L17 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|partoser[2]~28 at LCCOMB_X10_Y7_N28
R1L17 = R1_state.x_shift # R1_xmit_cmd_p & !R1_state.x_idle;


--R1L3 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|next_state.x_shift~10~2 at LCCOMB_X10_Y7_N8
R1L3 = R1_xcnt16[0] # R1L7 # !R1_state.x_wait # !B1L4;


--R1L9 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|next_state.x_wait~109~55 at LCCOMB_X9_Y7_N6
R1L9 = R1_state.x_wait & (R1_xcnt16[0] # !B1L4);


--B1L5 is KX232:inst1|rtl~92 at LCCOMB_X9_Y7_N22
B1L5 = B1L4 & R1_xcnt16[0];


--R1_state.x_start is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|state.x_start at LCFF_X9_Y7_N27
R1_state.x_start = DFFEAS(R1L4, GLOBAL(Q1L40), RST,  ,  ,  ,  ,  ,  );


--R1L10 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|next_state.x_wait~110~2 at LCCOMB_X9_Y7_N28
R1L10 = R1L9 # R1_state.x_shift # R1_state.x_start & B1L5;


--R1L1 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|next_state.x_idle~34~38 at LCCOMB_X10_Y7_N10
R1L1 = !R1_xmit_cmd_p & (B1L5 & R1_state.x_stop # !R1_state.x_idle);


--L1_hub_tdo is sld_hub:sld_hub_inst|hub_tdo at LCFF_X15_Y6_N15
L1_hub_tdo = AMPP_FUNCTION(!A1L8, L1L27, !FB1_state[8]);


--N1_xmit_startH is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|xmit_startH at LCFF_X8_Y7_N15
N1_xmit_startH = DFFEAS(N1L26, GLOBAL(Q1L40),  ,  ,  ,  ,  ,  ,  );


--R1L101 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xmit_cmd_p~101 at LCCOMB_X9_Y7_N4
R1L101 = B1L4 & (R1_xcnt16[0] & (!R1_state.x_wait) # !R1_xcnt16[0] & !R1_state.x_start) # !B1L4 & !R1_state.x_start & (!R1_state.x_wait);


--R1L102 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xmit_cmd_p~102 at LCCOMB_X9_Y7_N30
R1L102 = N1_xmit_startH # !R1_state.x_stop & R1L101 & R1_xmit_cmd_p;


--B1L1 is KX232:inst1|CLK~clkctrl at CLKCTRL_G2
B1L1 = cycloneii_clkctrl(.INCLK[0] = S1__clk0) WITH (clock_type = "Global Clock");


--R1L75 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xcnt16[0]~62 at LCCOMB_X9_Y7_N8
R1L75 = R1_xcnt16[0] $ VCC;

--R1L77 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xcnt16[0]~63 at LCCOMB_X9_Y7_N8
R1L77 = CARRY(R1_xcnt16[0]);


--R1L99 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xcnt16_en~47 at LCCOMB_X9_Y7_N0
R1L99 = R1L101 & !R1L5;


--R1L80 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xcnt16[1]~64 at LCCOMB_X9_Y7_N10
R1L80 = R1_xcnt16[1] & !R1L77 # !R1_xcnt16[1] & (R1L77 # GND);

--R1L82 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xcnt16[1]~65 at LCCOMB_X9_Y7_N10
R1L82 = CARRY(!R1L77 # !R1_xcnt16[1]);


--R1L85 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xcnt16[2]~66 at LCCOMB_X9_Y7_N12
R1L85 = R1_xcnt16[2] & (R1L82 $ GND) # !R1_xcnt16[2] & !R1L82 & VCC;

--R1L87 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xcnt16[2]~67 at LCCOMB_X9_Y7_N12
R1L87 = CARRY(R1_xcnt16[2] & !R1L82);


--R1L90 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xcnt16[3]~68 at LCCOMB_X9_Y7_N14
R1L90 = R1_xcnt16[3] & !R1L87 # !R1_xcnt16[3] & (R1L87 # GND);

--R1L92 is KX232:inst1|KONXIN1:inst1|KONXIN_EXP1:inst|suart:iUART|u_xmit:iXMIT|xcnt16[3]~69 at LCCOMB_X9_Y7_N14
R1L92 = CARRY(!R1L87 # !R1_xcnt16[3]);

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