full_empty.hier_info

基于FPGA编写的VHDL语言

|full_empty
rden_vaild <= inst11.DB_MAX_OUTPUT_PORT_TYPE
rd_addr_grey[0] => g2b:inst9.grey[0]
rd_addr_grey[0] => sync:inst.addr_a[0]
rd_addr_grey[1] => g2b:inst9.grey[1]
rd_addr_grey[1] => sync:inst.addr_a[1]
rd_addr_grey[2] => g2b:inst9.grey[2]
rd_addr_grey[2] => sync:inst.addr_a[2]
rd_addr_grey[3] => g2b:inst9.grey[3]
rd_addr_grey[3] => sync:inst.addr_a[3]
rd_addr_grey[4] => g2b:inst9.grey[4]
rd_addr_grey[4] => sync:inst.addr_a[4]
rdclk => sync:inst7.clk
wr_addr_gery[0] => sync:inst7.addr_a[0]
wr_addr_gery[0] => g2b:inst3.grey[0]
wr_addr_gery[1] => sync:inst7.addr_a[1]
wr_addr_gery[1] => g2b:inst3.grey[1]
wr_addr_gery[2] => sync:inst7.addr_a[2]
wr_addr_gery[2] => g2b:inst3.grey[2]
wr_addr_gery[3] => sync:inst7.addr_a[3]
wr_addr_gery[3] => g2b:inst3.grey[3]
wr_addr_gery[4] => sync:inst7.addr_a[4]
wr_addr_gery[4] => g2b:inst3.grey[4]
rden => inst11.IN1
empty <= empty_cmp:inst5.empty
full <= full_cmp:inst4.full
wrclk => sync:inst.clk
wren_valid <= inst10.DB_MAX_OUTPUT_PORT_TYPE
wren => inst10.IN0


|full_empty|empty_cmp:inst5
wr_addr[0] => Equal0.IN4
wr_addr[1] => Equal0.IN3
wr_addr[2] => Equal0.IN2
wr_addr[3] => Equal0.IN1
wr_addr[4] => Equal0.IN0
rd_addr[0] => Equal0.IN9
rd_addr[1] => Equal0.IN8
rd_addr[2] => Equal0.IN7
rd_addr[3] => Equal0.IN6
rd_addr[4] => Equal0.IN5
empty <= Equal0.DB_MAX_OUTPUT_PORT_TYPE


|full_empty|g2b:inst9
grey[0] => normal~3.IN0
grey[1] => normal~2.IN0
grey[2] => normal~1.IN0
grey[3] => normal~0.IN1
grey[4] => normal~0.IN0
grey[4] => norm[4].DATAIN
norm[0] <= normal~3.DB_MAX_OUTPUT_PORT_TYPE
norm[1] <= normal~2.DB_MAX_OUTPUT_PORT_TYPE
norm[2] <= normal~1.DB_MAX_OUTPUT_PORT_TYPE
norm[3] <= normal~0.DB_MAX_OUTPUT_PORT_TYPE
norm[4] <= grey[4].DB_MAX_OUTPUT_PORT_TYPE


|full_empty|g2b:inst8
grey[0] => normal~3.IN0
grey[1] => normal~2.IN0
grey[2] => normal~1.IN0
grey[3] => normal~0.IN1
grey[4] => normal~0.IN0
grey[4] => norm[4].DATAIN
norm[0] <= normal~3.DB_MAX_OUTPUT_PORT_TYPE
norm[1] <= normal~2.DB_MAX_OUTPUT_PORT_TYPE
norm[2] <= normal~1.DB_MAX_OUTPUT_PORT_TYPE
norm[3] <= normal~0.DB_MAX_OUTPUT_PORT_TYPE
norm[4] <= grey[4].DB_MAX_OUTPUT_PORT_TYPE


|full_empty|sync:inst7
clk => temp[4].CLK
clk => temp[3].CLK
clk => temp[2].CLK
clk => temp[1].CLK
clk => temp[0].CLK
clk => addr_s[4]~reg0.CLK
clk => addr_s[3]~reg0.CLK
clk => addr_s[2]~reg0.CLK
clk => addr_s[1]~reg0.CLK
clk => addr_s[0]~reg0.CLK
addr_a[0] => temp[0].DATAIN
addr_a[1] => temp[1].DATAIN
addr_a[2] => temp[2].DATAIN
addr_a[3] => temp[3].DATAIN
addr_a[4] => temp[4].DATAIN
addr_s[0] <= addr_s[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
addr_s[1] <= addr_s[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
addr_s[2] <= addr_s[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
addr_s[3] <= addr_s[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
addr_s[4] <= addr_s[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|full_empty|full_cmp:inst4
wr_addr[0] => Equal0.IN3
wr_addr[1] => Equal0.IN2
wr_addr[2] => Equal0.IN1
wr_addr[3] => Equal0.IN0
wr_addr[4] => full~0.IN0
rd_addr[0] => Equal0.IN7
rd_addr[1] => Equal0.IN6
rd_addr[2] => Equal0.IN5
rd_addr[3] => Equal0.IN4
rd_addr[4] => full~0.IN1
full <= full~1.DB_MAX_OUTPUT_PORT_TYPE


|full_empty|g2b:inst6
grey[0] => normal~3.IN0
grey[1] => normal~2.IN0
grey[2] => normal~1.IN0
grey[3] => normal~0.IN1
grey[4] => normal~0.IN0
grey[4] => norm[4].DATAIN
norm[0] <= normal~3.DB_MAX_OUTPUT_PORT_TYPE
norm[1] <= normal~2.DB_MAX_OUTPUT_PORT_TYPE
norm[2] <= normal~1.DB_MAX_OUTPUT_PORT_TYPE
norm[3] <= normal~0.DB_MAX_OUTPUT_PORT_TYPE
norm[4] <= grey[4].DB_MAX_OUTPUT_PORT_TYPE


|full_empty|sync:inst
clk => temp[4].CLK
clk => temp[3].CLK
clk => temp[2].CLK
clk => temp[1].CLK
clk => temp[0].CLK
clk => addr_s[4]~reg0.CLK
clk => addr_s[3]~reg0.CLK
clk => addr_s[2]~reg0.CLK
clk => addr_s[1]~reg0.CLK
clk => addr_s[0]~reg0.CLK
addr_a[0] => temp[0].DATAIN
addr_a[1] => temp[1].DATAIN
addr_a[2] => temp[2].DATAIN
addr_a[3] => temp[3].DATAIN
addr_a[4] => temp[4].DATAIN
addr_s[0] <= addr_s[0]~reg0.DB_MAX_OUTPUT_PORT_TYPE
addr_s[1] <= addr_s[1]~reg0.DB_MAX_OUTPUT_PORT_TYPE
addr_s[2] <= addr_s[2]~reg0.DB_MAX_OUTPUT_PORT_TYPE
addr_s[3] <= addr_s[3]~reg0.DB_MAX_OUTPUT_PORT_TYPE
addr_s[4] <= addr_s[4]~reg0.DB_MAX_OUTPUT_PORT_TYPE


|full_empty|g2b:inst3
grey[0] => normal~3.IN0
grey[1] => normal~2.IN0
grey[2] => normal~1.IN0
grey[3] => normal~0.IN1
grey[4] => normal~0.IN0
grey[4] => norm[4].DATAIN
norm[0] <= normal~3.DB_MAX_OUTPUT_PORT_TYPE
norm[1] <= normal~2.DB_MAX_OUTPUT_PORT_TYPE
norm[2] <= normal~1.DB_MAX_OUTPUT_PORT_TYPE
norm[3] <= normal~0.DB_MAX_OUTPUT_PORT_TYPE
norm[4] <= grey[4].DB_MAX_OUTPUT_PORT_TYPE