📄 g2b.tan.rpt
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Classic Timing Analyzer report for g2b
Thu Apr 09 21:29:40 2009
Quartus II Version 8.1 Build 163 10/28/2008 SJ Full Version
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Timing Analyzer Summary
3. Timing Analyzer Settings
4. tpd
5. Timing Analyzer Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2008 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+-------------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary ;
+------------------------------+-------+---------------+-------------+---------+---------+------------+----------+--------------+
; Type ; Slack ; Required Time ; Actual Time ; From ; To ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+-------+---------------+-------------+---------+---------+------------+----------+--------------+
; Worst-case tpd ; N/A ; None ; 11.937 ns ; grey[0] ; norm[0] ; -- ; -- ; 0 ;
; Total number of failed paths ; ; ; ; ; ; ; ; 0 ;
+------------------------------+-------+---------------+-------------+---------+---------+------------+----------+--------------+
+--------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
; Option ; Setting ; From ; To ; Entity Name ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
; Device Name ; EP2C8Q208C8 ; ; ; ;
; Timing Models ; Final ; ; ; ;
; Default hold multicycle ; Same as Multicycle ; ; ; ;
; Cut paths between unrelated clock domains ; On ; ; ; ;
; Cut off read during write signal paths ; On ; ; ; ;
; Cut off feedback from I/O pins ; On ; ; ; ;
; Report Combined Fast/Slow Timing ; Off ; ; ; ;
; Ignore Clock Settings ; Off ; ; ; ;
; Analyze latches as synchronous elements ; On ; ; ; ;
; Enable Recovery/Removal analysis ; Off ; ; ; ;
; Enable Clock Latency ; Off ; ; ; ;
; Use TimeQuest Timing Analyzer ; Off ; ; ; ;
; Minimum Core Junction Temperature ; 0 ; ; ; ;
; Maximum Core Junction Temperature ; 85 ; ; ; ;
; Number of source nodes to report per destination node ; 10 ; ; ; ;
; Number of destination nodes to report ; 10 ; ; ; ;
; Number of paths to report ; 200 ; ; ; ;
; Report Minimum Timing Checks ; Off ; ; ; ;
; Use Fast Timing Models ; Off ; ; ; ;
; Report IO Paths Separately ; Off ; ; ; ;
; Perform Multicorner Analysis ; On ; ; ; ;
; Reports the worst-case path for each clock domain and analysis ; Off ; ; ; ;
; Removes common clock path pessimism (CCPP) during slack computation ; Off ; ; ; ;
; Output I/O Timing Endpoint ; Near End ; ; ; ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
+-----------------------------------------------------------------+
; tpd ;
+-------+-------------------+-----------------+---------+---------+
; Slack ; Required P2P Time ; Actual P2P Time ; From ; To ;
+-------+-------------------+-----------------+---------+---------+
; N/A ; None ; 11.937 ns ; grey[0] ; norm[0] ;
; N/A ; None ; 11.908 ns ; grey[1] ; norm[0] ;
; N/A ; None ; 11.632 ns ; grey[3] ; norm[0] ;
; N/A ; None ; 11.512 ns ; grey[2] ; norm[0] ;
; N/A ; None ; 11.476 ns ; grey[1] ; norm[1] ;
; N/A ; None ; 11.201 ns ; grey[3] ; norm[1] ;
; N/A ; None ; 11.078 ns ; grey[2] ; norm[1] ;
; N/A ; None ; 10.807 ns ; grey[3] ; norm[2] ;
; N/A ; None ; 10.687 ns ; grey[2] ; norm[2] ;
; N/A ; None ; 9.627 ns ; grey[3] ; norm[3] ;
+-------+-------------------+-----------------+---------+---------+
+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Classic Timing Analyzer
Info: Version 8.1 Build 163 10/28/2008 SJ Full Version
Info: Processing started: Thu Apr 09 21:29:40 2009
Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off g2b -c g2b --timing_analysis_only
Info: Parallel compilation is enabled and will use 2 of the 2 processors detected
Info: Longest tpd from source pin "grey[0]" to destination pin "norm[0]" is 11.937 ns
Info: 1: + IC(0.000 ns) + CELL(0.994 ns) = 0.994 ns; Loc. = PIN_57; Fanout = 1; PIN Node = 'grey[0]'
Info: 2: + IC(5.750 ns) + CELL(0.624 ns) = 7.368 ns; Loc. = LCCOMB_X1_Y4_N24; Fanout = 1; COMB Node = 'normal~2'
Info: 3: + IC(1.273 ns) + CELL(3.296 ns) = 11.937 ns; Loc. = PIN_64; Fanout = 0; PIN Node = 'norm[0]'
Info: Total cell delay = 4.914 ns ( 41.17 % )
Info: Total interconnect delay = 7.023 ns ( 58.83 % )
Info: Parallel compilation was enabled but no parallel operations were performed
Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 129 megabytes
Info: Processing ended: Thu Apr 09 21:29:41 2009
Info: Elapsed time: 00:00:01
Info: Total CPU time (on all processors): 00:00:01
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