texi.vho

在Quartus II 5.0环境下

SIGNAL \add~9429_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \add~9235_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \add~9235_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \add~9349_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \add~9349_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \add~9354_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \add~9354_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \add~9359_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \add~9359_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \add~9240_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \add~9240_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \LessThan~2745_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \LessThan~2745_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee4~218_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee4~218_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \displayselect~I_modesel\ : std_logic_vector(26 DOWNTO 0);
SIGNAL \display~1953_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display~1953_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \_~78_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \_~78_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display[13]~1934_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display[13]~1934_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display[20]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display[20]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee4~217_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee4~217_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display[19]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display[19]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee4~216_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee4~216_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display[18]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display[18]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee1~115_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee1~115_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \LessThan~2753_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \LessThan~2753_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee3~1234_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee3~1234_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee3~1235_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee3~1235_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee3~1231_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee3~1231_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee3~1232_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee3~1232_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \LessThan~2773_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \LessThan~2773_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee3[5]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee3[5]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee3~1240_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee3~1240_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee3[4]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee3[4]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee3[2]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee3[2]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee3~1239_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee3~1239_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee3[3]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee3[3]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \temp2[4]~126_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \temp2[4]~126_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee2~1639_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee2~1639_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee2[2]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee2[2]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee2[1]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee2[1]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \LessThan~2754_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \LessThan~2754_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee2[5]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee2[5]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee2[3]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee2[3]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee3[1]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee3[1]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee2[4]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee2[4]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \temp2[4]~127_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \temp2[4]~127_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \temp2[4]~128_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \temp2[4]~128_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee4[2]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee4[2]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee4[3]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee4[3]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee4[4]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee4[4]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee4~215_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee4~215_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display[17]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display[17]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee4[1]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee4[1]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \temp2[4]~125_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \temp2[4]~125_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \temp2[4]~129_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \temp2[4]~129_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \temp2[1]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \temp2[1]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \temp2[2]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \temp2[2]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \temp2[3]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \temp2[3]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \temp2[4]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \temp2[4]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \feepksave2[5]~258_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \feepksave2[5]~258_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \feepksave2[5]~259_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \feepksave2[5]~259_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \feepksave1[4]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \feepksave1[4]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \add~9758_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \add~9758_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \add~9763_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \add~9763_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \add~9773_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \add~9773_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \feepksave1[5]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \feepksave1[5]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \add~9768_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \add~9768_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \feepksave1~226_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \feepksave1~226_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \feepksave1[2]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \feepksave1[2]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \feepksave1~227_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \feepksave1~227_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \feepksave1[3]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \feepksave1[3]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \LessThan~2775_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \LessThan~2775_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \feepksave2[5]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \feepksave2[5]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \add~9826_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \add~9826_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \add~9798_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \add~9798_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \feepksave2~260_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \feepksave2~260_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \feepksave2[2]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \feepksave2[2]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \feepksave2~261_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \feepksave2~261_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \feepksave2[3]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \feepksave2[3]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \LessThan~2761_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \LessThan~2761_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee13[1]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee13[1]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \add~9717_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \add~9717_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee13[3]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee13[3]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \rtl~1151_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \rtl~1151_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \rtl~1152_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \rtl~1152_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee13[2]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee13[2]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \add~9326_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \add~9326_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \fee3~1233_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \fee3~1233_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \LessThan~2752_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \LessThan~2752_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display[15]~1933_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display[15]~1933_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display[15]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display[15]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display[7]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display[7]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \add~9163_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \add~9163_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \add~9162_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \add~9162_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \deout1~2575_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \deout1~2575_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \deout1~2573_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \deout1~2573_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \deout1~2595_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \deout1~2595_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \deout1~2574_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \deout1~2574_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display[3]~1938_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display[3]~1938_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display~1943_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display~1943_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display~1944_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display~1944_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display[3]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display[3]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \deout1~2586_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \deout1~2586_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \deout1~2587_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \deout1~2587_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display[11]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display[11]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \add~9164_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \add~9164_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \deout1~2588_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \deout1~2588_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \deout1[3]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \deout1[3]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display[10]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display[10]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display[14]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display[14]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display[6]~I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display[6]~I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \display~1939_I_modesel\ : std_logic_vector(12 DOWNTO 0);
SIGNAL \display~1939_I_pathsel\ : std_logic_vector(10 DOWNTO 0);
SIGNAL \