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📄 texi.vho

📁 在Quartus II 5.0环境下
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	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "C30C",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => \displaycount[3]\,
	cin0 => \add~9384\,
	cin1 => \add~9384COUT1_9884\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \add~9142\,
	cout0 => \add~9144\,
	cout1 => \add~9144COUT1\);

\add~9147_I\ : cyclone_lcell
-- Equation(s):
-- \add~9147\ = \displaycount[4]\ $ \add~9144\
-- \add~9149\ = 

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "3C3F",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => \displaycount[4]\,
	cin0 => \add~9144\,
	cin1 => \add~9144COUT1\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \add~9147\,
	cout => \add~9149\);

\displaycount[5]~I\ : cyclone_lcell
-- Equation(s):
-- \displaycount[5]\ = DFFEAS(!\add~9157\ & !\add~9142\ & !\add~9147\ & \add~9152\, GLOBAL(\clk~combout\), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0100",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clk~combout\,
	dataa => \add~9157\,
	datab => \add~9142\,
	datac => \add~9147\,
	datad => \add~9152\,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \displaycount[5]\);

\add~9152_I\ : cyclone_lcell
-- Equation(s):
-- \add~9152\ = \displaycount[5]\ $ (!(!\add~9149\ & GND) # (\add~9149\ & VCC))
-- \add~9154\ = CARRY(\displaycount[5]\ & (!\add~9149\))
-- \add~9154COUT1_9885\ = CARRY(\displaycount[5]\ & (!\add~9149\))

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "A50A",
	cin_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => \displaycount[5]\,
	cin => \add~9149\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \add~9152\,
	cout0 => \add~9154\,
	cout1 => \add~9154COUT1_9885\);

\displaycount[4]~I\ : cyclone_lcell
-- Equation(s):
-- \displaycount[4]\ = DFFEAS(!\add~9152\ & \add~9147\ & !\add~9157\, GLOBAL(\clk~combout\), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0030",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clk~combout\,
	datab => \add~9152\,
	datac => \add~9147\,
	datad => \add~9157\,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \displaycount[4]\);

\add~9157_I\ : cyclone_lcell
-- Equation(s):
-- \add~9157\ = (!\add~9149\ & \add~9154\) # (\add~9149\ & \add~9154COUT1_9885\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "F0F0",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	cin => \add~9149\,
	cin0 => \add~9154\,
	cin1 => \add~9154COUT1_9885\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \add~9157\);

\LessThan~2744_I\ : cyclone_lcell
-- Equation(s):
-- \LessThan~2744\ = !\add~9157\ & (!\add~9142\ & !\add~9147\ # !\add~9152\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0155",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => \add~9157\,
	datab => \add~9142\,
	datac => \add~9147\,
	datad => \add~9152\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \LessThan~2744\);

\displaystate[3]~I\ : cyclone_lcell
-- Equation(s):
-- \displaystate[3]\ = DFFEAS(\LessThan~2744\ & !\displaystate[1]\ & !\displaystate[2]\ & \displaystate[3]\ # !\LessThan~2744\ & \displaystate[1]\ & \displaystate[2]\ & !\displaystate[3]\, GLOBAL(\clk~combout\), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "0240",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clk~combout\,
	dataa => \LessThan~2744\,
	datab => \displaystate[1]\,
	datac => \displaystate[2]\,
	datad => \displaystate[3]\,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \displaystate[3]\);

\displaystate[1]~I\ : cyclone_lcell
-- Equation(s):
-- \displaystate[1]\ = DFFEAS(!\displaystate[3]\ & (\LessThan~2744\ $ !\displaystate[1]\), GLOBAL(\clk~combout\), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "00C3",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clk~combout\,
	datab => \LessThan~2744\,
	datac => \displaystate[1]\,
	datad => \displaystate[3]\,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \displaystate[1]\);

\displaystate[2]~I\ : cyclone_lcell
-- Equation(s):
-- \displaystate[2]\ = DFFEAS(!\displaystate[3]\ & (\displaystate[2]\ $ (!\LessThan~2744\ & \displaystate[1]\)), GLOBAL(\clk~combout\), VCC, , , , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "00B4",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => \clk~combout\,
	dataa => \LessThan~2744\,
	datab => \displaystate[1]\,
	datac => \displaystate[2]\,
	datad => \displaystate[3]\,
	aclr => GND,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \displaystate[2]\);

\control[4]~4303_I\ : cyclone_lcell
-- Equation(s):
-- \control[4]~4303\ = \displaystate[2]\ & (!\displaystate[3]\) # !\displaystate[2]\ & (\LessThan~2744\ & (\displaystate[1]\ # \displaystate[3]\) # !\LessThan~2744\ & (!\displaystate[3]\ # !\displaystate[1]\))

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "23FD",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => \LessThan~2744\,
	datab => \displaystate[2]\,
	datac => \displaystate[1]\,
	datad => \displaystate[3]\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \control[4]~4303\);

\start~I\ : cyclone_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input",
	input_register_mode => "none",
	output_register_mode => "none",
	oe_register_mode => "none",
	input_async_reset => "none",
	output_async_reset => "none",
	oe_async_reset => "none",
	input_sync_reset => "none",
	output_sync_reset => "none",
	oe_sync_reset => "none",
	input_power_up => "low",
	output_power_up => "low",
	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_start,
	combout => \start~combout\);

\deout1~2579_I\ : cyclone_lcell
-- Equation(s):
-- \deout1~2579\ = \displaystate[2]\ & (\displaystate[3]\) # !\displaystate[2]\ & (\LessThan~2744\ & !\displaystate[1]\ & !\displaystate[3]\ # !\LessThan~2744\ & \displaystate[1]\ & \displaystate[3]\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "DC02",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => \LessThan~2744\,
	datab => \displaystate[2]\,
	datac => \displaystate[1]\,
	datad => \displaystate[3]\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \deout1~2579\);

\waitselect~I\ : cyclone_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input",
	input_register_mode => "none",
	output_register_mode => "none",
	oe_register_mode => "none",
	input_async_reset => "none",
	output_async_reset => "none",
	oe_async_reset => "none",
	input_sync_reset => "none",
	output_sync_reset => "none",
	oe_sync_reset => "none",
	input_power_up => "low",
	output_power_up => "low",
	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_waitselect,
	combout => \waitselect~combout\);

\deout1~2580_I\ : cyclone_lcell
-- Equation(s):
-- \deout1~2580\ = \start~combout\ & (\deout1~2579\ # \waitselect~combout\) # !\start~combout\ & !\control[4]~4303\ & (\waitselect~combout\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "DDC0",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => \control[4]~4303\,
	datab => \start~combout\,
	datac => \deout1~2579\,
	datad => \waitselect~combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \deout1~2580\);

\clr~I\ : cyclone_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input",
	input_register_mode => "none",
	output_register_mode => "none",
	oe_register_mode => "none",
	input_async_reset => "none",
	output_async_reset => "none",
	oe_async_reset => "none",
	input_sync_reset => "none",
	output_sync_reset => "none",
	oe_sync_reset => "none",
	input_power_up => "low",
	output_power_up => "low",
	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_clr,
	combout => \clr~combout\);

\control[4]~4305_I\ : cyclone_lcell
-- Equation(s):
-- \control[4]~4305\ = \start~combout\ & (\en~combout\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "CC00",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => \start~combout\,
	datad => \en~combout\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \control[4]~4305\);

\timecount3[2]~I\ : cyclone_lcell
-- Equation(s):
-- \timecount3[2]\ = DFFEAS(\add~9473\, GLOBAL(speed), GLOBAL(\clr~combout\), , \control[4]~4305\, , , , )

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "FF00",
	output_mode => "reg_only")
-- pragma translate_on
PORT MAP (
	clk => speed,
	datad => \add~9473\,
	aclr => \ALT_INV_clr~combout\,
	ena => \control[4]~4305\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	regout => \timecount3[2]\);

\add~9468_I\ : cyclone_lcell
-- Equation(s):
-- \add~9468\ = !\timecount3[1]\
-- \add~9470\ = CARRY(\timecount3[1]\)
-- \add~9470COUT1_9871\ = CARRY(\timecount3[1]\)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "datac",
	lut_mask => "33CC",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	datab => \timecount3[1]\,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => \add~9468\,
	cout0 => \add~9470\,
	cout1 => \add~9470COUT1_9871\);

\timecount3[1]~I\ : cyclone_lcell
12345

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