choose_decoder.vhd
来自「vhdl实现的计数器,可以从0记到999,该代码使用模块化设计思想,开发工具mu」· VHDL 代码 · 共 24 行
VHD
24 行
library ieee;
use ieee.std_logic_1164.all;
entity choose_decoder is
port(sel: in std_logic_vector(2 downto 0);
choose: out std_logic_vector(7 downto 0));
end choose_decoder;
architecture rt1 of choose_decoder is
begin
process(sel)
begin
case sel is
when"000"=>choose<="00000001";
when"001"=>choose<="00000010";
when"010"=>choose<="00000100";
when"011"=>choose<="00001000";
when"100"=>choose<="00010000";
when"101"=>choose<="00100000";
when"110"=>choose<="01000000";
when"111"=>choose<="10000000";
when others=>choose<="XXXXXXXX";
end case;
end process;
end rt1;
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