count999.vhd

vhdl实现的计数器,可以从0记到999,该代码使用模块化设计思想,开发工具muxplus2

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity count999 is
	port(
			clk: in bit;
			ck:  in bit;
			en:  in bit;
			rst: in bit;
			dataout: out std_logic_vector(7 downto 0);
			ctr: out std_logic_vector(2 downto 0)
		);
end;
architecture bhx of count999 is
signal a,b,c : std_logic_vector(3 downto 0);
signal d : integer range 4 downto 0;
begin
	process(clk,en,rst)
	variable an,bn,cn: std_logic_vector(3 downto 0);
	begin 
		if rst='1' then an := (others=>'0');bn := (others=>'0');cn := (others=>'0');
		elsif clk'event and clk='1' then 
		if en = '1' then 
			if an<9 then an :=an+1;		
			else an :=(others=>'0');
	end if;
	end if;
	end if;
		if an=9 then
		if bn<9 then bn :=bn+1;
		else bn :=(others=>'0');cn :=cn+1;
		end if;
		end if;
        a<=an;b<=bn;c<=cn;
end process;
	process(a,b,c,ck)
	begin
		if ck'event and ck='1' then
		if d='1' then d<='2';
		elsif d='2' then d<='4';
			else d<='4';
	end if;
	end if;
    case d is
		when 1 => dataout<=a;ctr<='1';
		when 2 => dataout<=b;ctr<='2';
		when 4 => dataout<=c;ctr<='4';
	end case;
	end process;
end bhx;