gmajpfi.vhd

来自「vhdl实现的计数器,可以从0记到999,该代码使用模块化设计思想,开发工具mu」· VHDL 代码 · 共 18 行

library ieee;
use ieee.std_logic_1164.all;
entity gmajpfi is
		port(
			 ch : in std_logic_vector(2 downto 0);
			 a : in std_logic_vector(3 downto 0);
			 b : in std_logic_vector(3 downto 0);
			 c : in std_logic_vector(3 downto 0);
			 dataout : out std_logic_vector(3 downto 0));
end gmajpfi;
architecture rtl of gmajpfi is
	begin 
	dataout<=a when ch="000"else
			 b when ch="001"else
			 c;
end rtl;