oc8051_defines.v

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`define OC8051_MOV_CB 8'b1001_0010 // move bit=c
`define OC8051_MOV_DP 8'b1001_0000 // move dptr=constant(16 bit)
`define OC8051_MOVC_DP 8'b1001_0011 // move A=dptr+A
`define OC8051_MOVC_PC 8'b1000_0011 // move A=pc+A
`define OC8051_MOVX_PA 8'b1110_0000 // move A=(dptr)
`define OC8051_MOVX_AP 8'b1111_0000 // move (dptr)=A
`define OC8051_MUL 8'b1010_0100 // multiply a*b
`define OC8051_NOP 8'b0000_0000 // no operation
`define OC8051_ORL_D 8'b0100_0101 // or A=A or (direct)
`define OC8051_ORL_C 8'b0100_0100 // or A=A or constant
`define OC8051_ORL_AD 8'b0100_0010 // or (direct)=(direct) or A
`define OC8051_ORL_CD 8'b0100_0011 // or (direct)=(direct) or constant
`define OC8051_ORL_B 8'b0111_0010 // or c = c or bit
`define OC8051_ORL_NB 8'b1010_0000 // or c = c or !bit
`define OC8051_POP 8'b1101_0000 // stack pop
`define OC8051_PUSH 8'b1100_0000 // stack push
`define OC8051_RET 8'b0010_0010 // return from subrutine
`define OC8051_RETI 8'b0011_0010 // return from interrupt
`define OC8051_RL 8'b0010_0011 // rotate left
`define OC8051_RLC 8'b0011_0011 // rotate left thrugh carry
`define OC8051_RR 8'b0000_0011 // rotate right
`define OC8051_RRC 8'b0001_0011 // rotate right thrugh carry
`define OC8051_SETB_C 8'b1101_0011 // set carry
`define OC8051_SETB_B 8'b1101_0010 // set bit
`define OC8051_SJMP 8'b1000_0000 // short jump
`define OC8051_SUBB_D 8'b1001_0101 // substract with borrow  A=A-c-(direct)
`define OC8051_SUBB_C 8'b1001_0100 // substract with borrow  A=A-c-constant
`define OC8051_SWAP 8'b1100_0100 // swap A(0-3) <-> A(4-7)
`define OC8051_XCH_D 8'b1100_0101 // exchange A<->(direct)
`define OC8051_XRL_D 8'b0110_0101 // XOR A=A XOR (direct)
`define OC8051_XRL_C 8'b0110_0100 // XOR A=A XOR constant
`define OC8051_XRL_AD 8'b0110_0010 // XOR (direct)=(direct) XOR A
`define OC8051_XRL_CD 8'b0110_0011 // XOR (direct)=(direct) XOR constant


//
// default values (used after reset)
//
`define OC8051_RST_PC 23'h0 // program counter
`define OC8051_RST_ACC 8'h00 // accumulator
`define OC8051_RST_B 8'h00 // b register
`define OC8051_RST_PSW 8'h00 // program status word
`define OC8051_RST_SP 8'b0000_0111 // stack pointer
`define OC8051_RST_DPH 8'h00 // data pointer (high)
`define OC8051_RST_DPL 8'h00 // data pointer (low)
`define OC8051_RST_P0 8'b1111_1111 // port 0
`define OC8051_RST_P1 8'b1111_1111 // port 1
`define OC8051_RST_P2 8'b1111_1111 // port 2
`define OC8051_RST_P3 8'b1111_1111 // port 3
`define OC8051_RST_IP 8'b0000_0000 // interrupt priority
`define OC8051_RST_IE 8'b0000_0000 // interrupt enable
`define OC8051_RST_TMOD 8'b0000_0000 // timer/counter mode control
`define OC8051_RST_TCON 8'b0000_0000 // timer/counter control
`define OC8051_RST_TH0 8'b0000_0000 // timer/counter 0 high bits
`define OC8051_RST_TL0 8'b0000_0000 // timer/counter 0 low bits
`define OC8051_RST_TH1 8'b0000_0000 // timer/counter 1 high bits
`define OC8051_RST_TL1 8'b0000_0000 // timer/counter 1 low bits
`define OC8051_RST_SCON 8'b0000_0000 // serial control
`define OC8051_RST_SBUF 8'b0000_0000 // serial data buffer
`define OC8051_RST_PCON 8'b0000_0000 // power control register



`define OC8051_RST_RCAP2H 8'h00 // timer 2 capture high
`define OC8051_RST_RCAP2L 8'h00 // timer 2 capture low

`define OC8051_RST_T2CON 8'h00 // timer 2 control register
`define OC8051_RST_T2MOD 8'h00 // timer 2 mode control
`define OC8051_RST_TH2 8'h00 // timer 2 high
`define OC8051_RST_TL2 8'h00 // timer 2 low


//
// alu source 1 select
//
`define OC8051_AS1_RAM  3'b000 // RAM
`define OC8051_AS1_OP1  3'b111 //
`define OC8051_AS1_OP2  3'b001 //
`define OC8051_AS1_OP3  3'b010 //
`define OC8051_AS1_ACC  3'b011 // accumulator
`define OC8051_AS1_PCH  3'b100 //
`define OC8051_AS1_PCL  3'b101 //
`define OC8051_AS1_DC   3'b000 //

//
// alu source 2 select
//
`define OC8051_AS2_RAM   3'b00 // RAM
`define OC8051_AS2_ACC   3'b01 // accumulator
`define OC8051_AS2_ZERO  3'b10 // 8'h00
`define OC8051_AS2_OP2   3'b11 //

`define OC8051_AS2_DC    3'b00 //

//
// alu source 3 select
//
`define OC8051_AS3_DP   1'b0 // data pointer
`define OC8051_AS3_PC   1'b1 // program clunter
//`define OC8051_AS3_PCU  3'b101 // program clunter not registered
`define OC8051_AS3_DC   1'b0  //


//
//write sfr
//
`define OC8051_WRS_N    2'b00  //no
`define OC8051_WRS_ACC1 2'b01  // acc destination 1
`define OC8051_WRS_ACC2 2'b10  // acc destination 2
`define OC8051_WRS_DPTR 2'b11  // data pointer


//
// ram read select
//

`define OC8051_RRS_RN   3'b000 // registers
`define OC8051_RRS_I    3'b001 // indirect addressing (op2)
`define OC8051_RRS_D    3'b010 // direct addressing
`define OC8051_RRS_SP   3'b011 // stack pointer

`define OC8051_RRS_B    3'b100 // b register
`define OC8051_RRS_DPTR 3'b101 // data pointer
`define OC8051_RRS_PSW  3'b110 // program status word
`define OC8051_RRS_ACC  3'b111 // acc

`define OC8051_RRS_DC 3'b000 // don't c

//
// ram write select
//

`define OC8051_RWS_RN 3'b000 // registers
`define OC8051_RWS_D  3'b001 // direct addressing
`define OC8051_RWS_I  3'b010 // indirect addressing
`define OC8051_RWS_SP 3'b011 // stack pointer
`define OC8051_RWS_D3 3'b101 // direct address (op3)
`define OC8051_RWS_D1 3'b110 // direct address (op1)
`define OC8051_RWS_B  3'b111 // b register
`define OC8051_RWS_DC 3'b000 //

//
// pc in select
//
`define OC8051_PIS_DC  3'b000 // dont c
`define OC8051_PIS_AL  3'b000 // alu low
`define OC8051_PIS_AH  3'b001 // alu high
`define OC8051_PIS_SO1 3'b010 // relative address, op1
`define OC8051_PIS_SO2 3'b011 // relative address, op2
`define OC8051_PIS_I11 3'b100 // 11 bit immediate
`define OC8051_PIS_I16 3'b101 // 16 bit immediate
`define OC8051_PIS_ALU 3'b110 // alu destination {des2, des1}

//
// compare source select
//
`define OC8051_CSS_AZ  2'b00 // eq = accumulator == zero
`define OC8051_CSS_DES 2'b01 // eq = destination == zero
`define OC8051_CSS_CY  2'b10 // eq = cy
`define OC8051_CSS_BIT 2'b11 // eq = b_in
`define OC8051_CSS_DC  2'b01 // don't care


//
// pc Write
//
`define OC8051_PCW_N 1'b0 // not
`define OC8051_PCW_Y 1'b1 // yes

//
//psw set
//
`define OC8051_PS_NOT 2'b00 // DONT
`define OC8051_PS_CY 2'b01 // only carry
`define OC8051_PS_OV 2'b10 // carry and overflov
`define OC8051_PS_AC 2'b11 // carry, overflov an ac...

//
// rom address select
//
`define OC8051_RAS_PC 1'b0 // program counter
`define OC8051_RAS_DES 1'b1 // alu destination

////
//// write accumulator
////
//`define OC8051_WA_N 1'b0 // not
//`define OC8051_WA_Y 1'b1 // yes


//
//memory action select
//
`define OC8051_MAS_DPTR_R 3'b000 // read from external rom: acc=(dptr)
`define OC8051_MAS_DPTR_W 3'b001 // write to external rom: (dptr)=acc
`define OC8051_MAS_RI_R   3'b010 // read from external rom: acc=(Ri)
`define OC8051_MAS_RI_W   3'b011 // write to external rom: (Ri)=acc
`define OC8051_MAS_CODE   3'b100 // read from program memory
`define OC8051_MAS_NO     3'b111 // no action


////////////////////////////////////////////////////

//
// Timer/Counter modes
//

`define OC8051_MODE0 2'b00  // mode 0
`define OC8051_MODE1 2'b01  // mode 0
`define OC8051_MODE2 2'b10  // mode 0
`define OC8051_MODE3 2'b11  // mode 0


//
// Interrupt numbers (vectors)
//

`define OC8051_INT_X0   8'h03  // external interrupt 0
`define OC8051_INT_T0   8'h0b  // T/C 0 owerflow interrupt
`define OC8051_INT_X1   8'h13  // external interrupt 1
`define OC8051_INT_T1   8'h1b  // T/C 1 owerflow interrupt
`define OC8051_INT_UART 8'h23  // uart interrupt
`define OC8051_INT_T2   8'h2b  // T/C 2 owerflow interrupt


//
// interrupt levels
//

`define OC8051_ILEV_L0 1'b0  // interrupt on level 0
`define OC8051_ILEV_L1 1'b1  // interrupt on level 1

//
// interrupt sources
//
`define OC8051_ISRC_NO   3'b000  // no interrupts
`define OC8051_ISRC_IE0  3'b001  // EXTERNAL INTERRUPT 0
`define OC8051_ISRC_TF0  3'b010  // t/c owerflov 0
`define OC8051_ISRC_IE1  3'b011  // EXTERNAL INTERRUPT 1
`define OC8051_ISRC_TF1  3'b100  // t/c owerflov 1
`define OC8051_ISRC_UART 3'b101  // UART  Interrupt
`define OC8051_ISRC_T2   3'b110  // t/c owerflov 2



//
// miscellaneus
//

`define OC8051_RW0 1'b1
`define OC8051_RW1 1'b0


//
// read modify write instruction
//

`define OC8051_RMW_Y 1'b1  // yes
`define OC8051_RMW_N 1'b0  // no