install.txt

Free 8051 core upload

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-- Copyright (c) 1999-2006  Digital Core Design  DCD                        --
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Installation instruction - DP8051_FREE package
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By installing this package you have accepted Software License Agreement.

I.   Compiling Quartus project.

1. Run Quartus project file example.qpf by double clicking or choosing 
   File->Open Project in Quartus environment.
2. Make assignments (device, pins, timing, etc) by selecting appropriate option in
   Assignments (main menu). This step is required when You plan to load 
   project into FPGA device.
3. Run Compilation (Processing->Start Compilation).
4. After compilation You can simulate behaviour of example project loaded 
   into ROM memory during synthesis. Content of program memory is loaded from 
   ROM.hex file in main project folder.
   Select Processing->Start Simulation to start simulation. Example waveform
   file with input vectors (example.wvf) is in main project folder.

II.  Programming an FPGA device

1. Be sure that all connections to Your FPGA device are correct.
2. Select Tools->Programmer. 
3. When .sof file is not added automatically, choose file with .sof extension 
   from main project folder. Be sure that selected .sof file is last updated.
4. Check appropriate option in dialog box, "Program/Configure" is required.
5. Start programming device by clicking "Start".

III. Changing and compiling software project

  There is an example software project in .\ASM folder. There is also 
assembler, linker and converter executable files which can be used for project
compilation. For compile example assembler code project, You can run batch 
file (.\ASM\compile.bat). Followed steps should be issued for simple changing
software project.

1. Change assembler code in .\ASM\rom.asm file.
2. Run compile batch file .\ASM\compile.bat
3. After successful compilation "HEX" file .\ASM\rom.hex should be updated. 
4. Copy .\ASM\rom.hex to main project folder (replace old rom.hex file).
5. Recompile Quartus project.

  After this steps You should get an updated .sof file with new content of 
ROM program memory. You can simulate behaviour of Your new project by .wvf 
file (see Compiling Quartus project step 4) or program FPGA with new .sof file 
(see Programming FPGA device).

  When You decide to make Your own software project by different way, You must
remember, that .hex file used as init file for rom.v module in Quartus project, 
must be named as rom.hex. You can use different name of init  file, but 
then You must change related file name (and/or path) in rom.v Verilog module.

       

Support
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   Although  every  effort  has  been  made to ensure that this core functions 
   correctly, if  a problem is encountered please contact Digital Core Design:

      Technical Support Hotline : [phone]
      Fax                       : [phone]
      E-mail                    : [e-mail]