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% By Michael Schulte and James Stine in Jan, 1996. \documentstyle[12pt]{article}% \textheight 25cm% \topmargin -.5cm% \textwidth 18cm% \oddsidemargin -1cm% \evensidemargin -1cm\textheight 23.5cm\textwidth 17cm\topmargin 0cm\oddsidemargin 0cm\begin{document}\include{boxedeps}\SetRokickiEPSFSpecial\HideDisplacementBoxes\title{An 8 bit Microprocessor Design, with 16 bit Addressing Capabilities, in Max Plus + }\author{Louis P. Marquette\\111 Sebring Rd\\Dickson City, PA 18519, USA\\Louis@starrtechnologies.com\\http://www.starrtechnologies.com/louis/}\date{}\maketitle\vspace{-1cm}\begin{abstract}\end{abstract}\section{Introduction}     This processor was designed to be simple to create, for that reason there are only 4 registers, few basic logic commands, onlythe most necessary flags, and only 65k bytes of addressable memory.This design scheme led to it's being single cycle RISC-like. All memory access, besides the normal stepping through the program, uses the AB register combination for the memory address.  Because of the limited number of registers, this processor is severely crippled in performance. This might be the worst part of its design.The instruction format is the standard "Opcode Operand, Operand". Load and Store currently do not operate correctly because of memoryaccess conflicts with the IFU. The main design file contains thelayout of the microprocessor. ie all the components and their interconnections. Each smaller component, the ALU for example, is in itsown design file and might even be itself a collection of smaller units.\section{Accomplishments}	This design was first thought up for a computer architecture andarithmetic class which required a class project. As a result, the layout and general principles were learned in that class and not theresult of trial and error or additional research. The layout is verybasic and was designed at the same time that the opcodes were designated to try to make them work well together. Although all of the architecture principles were learned in class, there was research needed to discover how a register operated and how to createone out of flip-flops. Because of the nature of the language, the entire design is structural. ie Everything is detailed down to the gate level. In the begining, I attempted to find a sample of some sortto help my learning of Max Plus +; however, none were to be found. This resulted in my doing the entire design from scratch.\section{Experience}	This projects represents the first layout for a microprocessor that I have done. It took some time getting use to the software andwas interesting to learn that I could create a waveform for stimulusfor the design. There were some snags along the way, including: having to use a larger model mode since the design grew so big, dealing witherrors created by timing (this was almost impossible), and trying to access memory for the operation and data access in the same cycle (this still has not been accompliched and may require either a second out of phase clock or a multi-cycle design). There were many times in the process of actually laying out what I had envisioned that I realized there was an easier way to do something. Hopefully all these painfull realizationswill make my next design better.\section{Conclusions} 	A microprocessor with only 4 registers is almost useless. There wouldbe too much main memory useage, and accessing main memory would require 2 of the registers for the address and one for data. This only leaves one register not involved in memory access. This would need to be addressed if this is ever redesigned. 	Lots of interconect wires running all over the screen can cause muchconfusion. Many times I made stupid and hard to find mistakes because I tapped into the wrong signal wire. This was especially true in the ControlLogic because of its complexity and massiveness.	Microprocessor design is much less tedious and much easier when done visually then when done in a text based language such as VHDL. Ihave used VHDL software to design a much more complex 32 bit RISC multi-cycle microprocessor. The Max Plus + work seemed to go much faster and it was easier to see where everything was headed because I have an actual picture of my design infront of me rather then textwhich I had to interprit. However, VHDL allows for not only the structural type of designs, which would be described by a picture, but by procedural, which are more powerful and complex but cannot be turned into a picture. \bibliography{paper}\bibliographystyle{ieeetr}\end{document}

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