mlt.cdf

VHDL 乘法器 源代码

/* Quartus II Version 8.0 Build 215 05/29/2008 SJ Full Version */
JedecChain;
	FileRevision(JESD32A);
	DefaultMfr(6E);

	P ActionCode(Cfg)
		Device PartName(EPM1270T144) Path("C:/altera/80/quartus/vhdl/basicexperiment/multiplier/") File("mlt.pof") MfrSpec(OpMask(23) SEC_Device(EPM1270T144) Child_OpMask(2 23 7));

ChainEnd;

AlteraBegin;
	ChainType(JTAG);
AlteraEnd;