📄 add.tan.rpt
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Classic Timing Analyzer report for add
Mon Apr 20 14:13:26 2009
Quartus II Version 8.0 Build 215 05/29/2008 SJ Full Version
---------------------
; Table of Contents ;
---------------------
1. Legal Notice
2. Timing Analyzer Summary
3. Timing Analyzer Settings
4. tpd
5. Timing Analyzer Messages
----------------
; Legal Notice ;
----------------
Copyright (C) 1991-2008 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files from any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
+-------------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Summary ;
+------------------------------+-------+---------------+-------------+------+------+------------+----------+--------------+
; Type ; Slack ; Required Time ; Actual Time ; From ; To ; From Clock ; To Clock ; Failed Paths ;
+------------------------------+-------+---------------+-------------+------+------+------------+----------+--------------+
; Worst-case tpd ; N/A ; None ; 12.034 ns ; a[0] ; c[6] ; -- ; -- ; 0 ;
; Total number of failed paths ; ; ; ; ; ; ; ; 0 ;
+------------------------------+-------+---------------+-------------+------+------+------------+----------+--------------+
+--------------------------------------------------------------------------------------------------------------------+
; Timing Analyzer Settings ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
; Option ; Setting ; From ; To ; Entity Name ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
; Device Name ; EPM1270T144C5 ; ; ; ;
; Timing Models ; Final ; ; ; ;
; Default hold multicycle ; Same as Multicycle ; ; ; ;
; Cut paths between unrelated clock domains ; On ; ; ; ;
; Cut off read during write signal paths ; On ; ; ; ;
; Cut off feedback from I/O pins ; On ; ; ; ;
; Report Combined Fast/Slow Timing ; Off ; ; ; ;
; Ignore Clock Settings ; Off ; ; ; ;
; Analyze latches as synchronous elements ; Off ; ; ; ;
; Enable Recovery/Removal analysis ; Off ; ; ; ;
; Enable Clock Latency ; Off ; ; ; ;
; Use TimeQuest Timing Analyzer ; Off ; ; ; ;
; Number of source nodes to report per destination node ; 10 ; ; ; ;
; Number of destination nodes to report ; 10 ; ; ; ;
; Number of paths to report ; 200 ; ; ; ;
; Report Minimum Timing Checks ; Off ; ; ; ;
; Use Fast Timing Models ; Off ; ; ; ;
; Report IO Paths Separately ; Off ; ; ; ;
; Perform Multicorner Analysis ; Off ; ; ; ;
; Reports the worst-case path for each clock domain and analysis ; Off ; ; ; ;
; Removes common clock path pessimism (CCPP) during slack computation ; Off ; ; ; ;
+---------------------------------------------------------------------+--------------------+------+----+-------------+
+-----------------------------------------------------------+
; tpd ;
+-------+-------------------+-----------------+------+------+
; Slack ; Required P2P Time ; Actual P2P Time ; From ; To ;
+-------+-------------------+-----------------+------+------+
; N/A ; None ; 12.034 ns ; a[0] ; c[6] ;
; N/A ; None ; 11.979 ns ; a[1] ; c[6] ;
; N/A ; None ; 11.976 ns ; b[1] ; c[6] ;
; N/A ; None ; 11.928 ns ; a[0] ; c[7] ;
; N/A ; None ; 11.899 ns ; a[0] ; c[5] ;
; N/A ; None ; 11.873 ns ; a[1] ; c[7] ;
; N/A ; None ; 11.870 ns ; b[1] ; c[7] ;
; N/A ; None ; 11.844 ns ; a[1] ; c[5] ;
; N/A ; None ; 11.841 ns ; b[1] ; c[5] ;
; N/A ; None ; 11.760 ns ; b[0] ; c[6] ;
; N/A ; None ; 11.654 ns ; b[0] ; c[7] ;
; N/A ; None ; 11.625 ns ; b[0] ; c[5] ;
; N/A ; None ; 11.525 ns ; a[0] ; c[2] ;
; N/A ; None ; 11.520 ns ; a[0] ; c[1] ;
; N/A ; None ; 11.470 ns ; a[1] ; c[2] ;
; N/A ; None ; 11.467 ns ; b[1] ; c[2] ;
; N/A ; None ; 11.465 ns ; a[1] ; c[1] ;
; N/A ; None ; 11.462 ns ; b[1] ; c[1] ;
; N/A ; None ; 11.396 ns ; a[0] ; c[4] ;
; N/A ; None ; 11.385 ns ; a[0] ; c[3] ;
; N/A ; None ; 11.341 ns ; a[1] ; c[4] ;
; N/A ; None ; 11.338 ns ; b[1] ; c[4] ;
; N/A ; None ; 11.330 ns ; a[1] ; c[3] ;
; N/A ; None ; 11.327 ns ; b[1] ; c[3] ;
; N/A ; None ; 11.251 ns ; b[0] ; c[2] ;
; N/A ; None ; 11.246 ns ; b[0] ; c[1] ;
; N/A ; None ; 11.122 ns ; b[0] ; c[4] ;
; N/A ; None ; 11.111 ns ; b[0] ; c[3] ;
; N/A ; None ; 10.904 ns ; b[2] ; c[6] ;
; N/A ; None ; 10.798 ns ; b[2] ; c[7] ;
; N/A ; None ; 10.786 ns ; b[2] ; c[2] ;
; N/A ; None ; 10.776 ns ; b[2] ; c[1] ;
; N/A ; None ; 10.769 ns ; b[2] ; c[5] ;
; N/A ; None ; 10.764 ns ; a[2] ; c[6] ;
; N/A ; None ; 10.658 ns ; a[2] ; c[7] ;
; N/A ; None ; 10.651 ns ; a[2] ; c[2] ;
; N/A ; None ; 10.641 ns ; a[2] ; c[1] ;
; N/A ; None ; 10.629 ns ; a[2] ; c[5] ;
; N/A ; None ; 10.266 ns ; b[2] ; c[4] ;
; N/A ; None ; 10.255 ns ; b[2] ; c[3] ;
; N/A ; None ; 10.126 ns ; a[2] ; c[4] ;
; N/A ; None ; 10.115 ns ; a[2] ; c[3] ;
+-------+-------------------+-----------------+------+------+
+--------------------------+
; Timing Analyzer Messages ;
+--------------------------+
Info: *******************************************************************
Info: Running Quartus II Classic Timing Analyzer
Info: Version 8.0 Build 215 05/29/2008 SJ Full Version
Info: Processing started: Mon Apr 20 14:13:25 2009
Info: Command: quartus_tan --read_settings_files=on --write_settings_files=off add -c add --speed=5
Info: Started post-fitting delay annotation
Info: Delay annotation completed successfully
Info: Longest tpd from source pin "a[0]" to destination pin "c[6]" is 12.034 ns
Info: 1: + IC(0.000 ns) + CELL(1.132 ns) = 1.132 ns; Loc. = PIN_71; Fanout = 3; PIN Node = 'a[0]'
Info: 2: + IC(3.500 ns) + CELL(0.200 ns) = 4.832 ns; Loc. = LC_X13_Y7_N8; Fanout = 2; COMB Node = 'Add0~309'
Info: 3: + IC(0.740 ns) + CELL(0.200 ns) = 5.772 ns; Loc. = LC_X13_Y7_N4; Fanout = 7; COMB Node = 'Add0~310'
Info: 4: + IC(0.835 ns) + CELL(0.511 ns) = 7.118 ns; Loc. = LC_X13_Y7_N6; Fanout = 1; COMB Node = 'Mux1~3'
Info: 5: + IC(2.594 ns) + CELL(2.322 ns) = 12.034 ns; Loc. = PIN_108; Fanout = 0; PIN Node = 'c[6]'
Info: Total cell delay = 4.365 ns ( 36.27 % )
Info: Total interconnect delay = 7.669 ns ( 63.73 % )
Info: Quartus II Classic Timing Analyzer was successful. 0 errors, 0 warnings
Info: Peak virtual memory: 123 megabytes
Info: Processing ended: Mon Apr 20 14:13:26 2009
Info: Elapsed time: 00:00:01
Info: Total CPU time (on all processors): 00:00:01
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