add.fit.summary

vhdl 学习基础实例,有利于VHDL入门很有帮助

Fitter Status : Successful - Mon Apr 20 14:12:14 2009
Quartus II Version : 8.0 Build 215 05/29/2008 SJ Full Version
Revision Name : add
Top-level Entity Name : add
Family : MAX II
Device : EPM1270T144C5
Timing Models : Final
Total logic elements : 12 / 1,270 ( < 1 % )
Total pins : 22 / 116 ( 19 % )
Total virtual pins : 0
UFM blocks : 0 / 1 ( 0 % )