sdram_tb.fit.eqn

SDRAM IPCore控制程序源代码。 请问有无usb原码

C1_refTimer_r[6]_lut_out = C1L67 & C1L832;
C1_refTimer_r[6] = DFFEAS(C1_refTimer_r[6]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1_refTimer_r[5] is sdramCntl:sdram1|refTimer_r[5] at LC_X26_Y9_N4
--operation mode is normal

C1_refTimer_r[5]_lut_out = C1L832 & (C1L97);
C1_refTimer_r[5] = DFFEAS(C1_refTimer_r[5]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1_refTimer_r[4] is sdramCntl:sdram1|refTimer_r[4] at LC_X26_Y9_N5
--operation mode is normal

C1_refTimer_r[4]_lut_out = C1L832 & (C1L28);
C1_refTimer_r[4] = DFFEAS(C1_refTimer_r[4]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1L632 is sdramCntl:sdram1|reduce_or~415 at LC_X26_Y9_N8
--operation mode is normal

C1L632 = C1_refTimer_r[6] # C1_refTimer_r[5] # C1_refTimer_r[7] # C1_refTimer_r[4];


--C1_refTimer_r[0] is sdramCntl:sdram1|refTimer_r[0] at LC_X26_Y9_N9
--operation mode is normal

C1_refTimer_r[0]_lut_out = C1L48 & C1L832;
C1_refTimer_r[0] = DFFEAS(C1_refTimer_r[0]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1_refTimer_r[9] is sdramCntl:sdram1|refTimer_r[9] at LC_X26_Y9_N3
--operation mode is normal

C1_refTimer_r[9]_lut_out = !C1L78;
C1_refTimer_r[9] = DFFEAS(C1_refTimer_r[9]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1_refTimer_r[8] is sdramCntl:sdram1|refTimer_r[8] at LC_X26_Y9_N2
--operation mode is normal

C1_refTimer_r[8]_lut_out = !C1L88;
C1_refTimer_r[8] = DFFEAS(C1_refTimer_r[8]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1_refTimer_r[3] is sdramCntl:sdram1|refTimer_r[3] at LC_X26_Y9_N6
--operation mode is normal

C1_refTimer_r[3]_lut_out = !C1L19;
C1_refTimer_r[3] = DFFEAS(C1_refTimer_r[3]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1L732 is sdramCntl:sdram1|reduce_or~416 at LC_X26_Y9_N7
--operation mode is normal

C1L732 = C1_refTimer_r[0] # !C1_refTimer_r[3] # !C1_refTimer_r[9] # !C1_refTimer_r[8];


--C1_refTimer_r[2] is sdramCntl:sdram1|refTimer_r[2] at LC_X26_Y8_N2
--operation mode is normal

C1_refTimer_r[2]_lut_out = !C1L49;
C1_refTimer_r[2] = DFFEAS(C1_refTimer_r[2]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1_refTimer_r[1] is sdramCntl:sdram1|refTimer_r[1] at LC_X27_Y10_N2
--operation mode is normal

C1_refTimer_r[1]_lut_out = !C1L79;
C1_refTimer_r[1] = DFFEAS(C1_refTimer_r[1]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1L832 is sdramCntl:sdram1|reduce_or~417 at LC_X24_Y8_N0
--operation mode is normal

C1L832 = C1L732 # C1L632 # !C1_refTimer_r[2] # !C1_refTimer_r[1];


--C1L22 is sdramCntl:sdram1|add~2358 at LC_X24_Y8_N5
--operation mode is normal

C1L22 = !C1L832 & (!C1L001 # !C1L953 # !C1L933);


--C1L043 is sdramCntl:sdram1|Select~913 at LC_X24_Y9_N9
--operation mode is normal

C1L043 = !C1L822 & !C1L183 # !C1_state_r.selfrefresh;


--C1L562 is sdramCntl:sdram1|rfshCntr_r[3]~364 at LC_X24_Y9_N8
--operation mode is normal

C1L562 = !C1L332 & (C1_state_r.initpchg # !C1L043);


--C1L452 is sdramCntl:sdram1|rfshCntr_r[0]~367COUT0_372 at LC_X24_Y10_N3
--operation mode is arithmetic

C1L452_cout_0 = !C1L332 & !C1L02;
C1L452 = CARRY(C1L452_cout_0);

--C1L552 is sdramCntl:sdram1|rfshCntr_r[0]~367COUT1_373 at LC_X24_Y10_N3
--operation mode is arithmetic

C1L552_cout_1 = !C1L332 & !C1L02;
C1L552 = CARRY(C1L552_cout_1);


--C1L32 is sdramCntl:sdram1|add~2359 at LC_X24_Y10_N1
--operation mode is normal

C1L32 = !C1L432 & !C1L532 & (C1_state_r.refreshrow # C1_state_r.initrfsh);


--C1L42 is sdramCntl:sdram1|add~2360 at LC_X24_Y10_N0
--operation mode is normal

C1L42 = C1_rfshCntr_r[1] & (C1L432 # C1L532 # !C1_state_r.initpchg);


--C1L52 is sdramCntl:sdram1|add~2361 at LC_X25_Y10_N4
--operation mode is normal

C1L52 = C1_rfshCntr_r[2] & (C1L532 # C1L432 # !C1_state_r.initpchg);


--C1L62 is sdramCntl:sdram1|add~2362 at LC_X25_Y10_N0
--operation mode is normal

C1L62 = C1_rfshCntr_r[3] & (C1L532 # C1L432 # !C1_state_r.initpchg);


--C1L72 is sdramCntl:sdram1|add~2363 at LC_X25_Y10_N1
--operation mode is normal

C1L72 = C1_rfshCntr_r[4] & (C1L532 # C1L432 # !C1_state_r.initpchg);


--C1L82 is sdramCntl:sdram1|add~2364 at LC_X25_Y10_N3
--operation mode is normal

C1L82 = C1_rfshCntr_r[5] & (C1L532 # C1L432 # !C1_state_r.initpchg);


--C1L92 is sdramCntl:sdram1|add~2365 at LC_X24_Y9_N7
--operation mode is normal

C1L92 = C1_rfshCntr_r[6] & (C1L432 # C1L532 # !C1_state_r.initpchg);


--C1L03 is sdramCntl:sdram1|add~2366 at LC_X24_Y7_N3
--operation mode is normal

C1L03 = C1_rfshCntr_r[7] & (C1L532 # C1L432 # !C1_state_r.initpchg);


--C1L13 is sdramCntl:sdram1|add~2367 at LC_X24_Y7_N9
--operation mode is normal

C1L13 = C1_rfshCntr_r[8] & (C1L532 # C1L432 # !C1_state_r.initpchg);


--C1L23 is sdramCntl:sdram1|add~2368 at LC_X25_Y10_N6
--operation mode is normal

C1L23 = C1_rfshCntr_r[9] & (C1L432 # C1L532 # !C1_state_r.initpchg);


--C1L33 is sdramCntl:sdram1|add~2369 at LC_X25_Y10_N5
--operation mode is normal

C1L33 = C1_rfshCntr_r[10] & (C1L432 # C1L532 # !C1_state_r.initpchg);


--C1L43 is sdramCntl:sdram1|add~2370 at LC_X25_Y10_N2
--operation mode is normal

C1L43 = C1_rfshCntr_r[11] & (C1L532 # C1L432 # !C1_state_r.initpchg);


--C1L53 is sdramCntl:sdram1|add~2371 at LC_X25_Y10_N9
--operation mode is normal

C1L53 = C1_rfshCntr_r[12] & (C1L532 # C1L432 # !C1_state_r.initpchg);


--B1_state_r.stop is memTest:memt|state_r.stop at LC_X20_Y6_N9
--operation mode is normal

B1_state_r.stop_lut_out = rst_n & (B1L701 & B1L07);
B1_state_r.stop = DFFEAS(B1_state_r.stop_lut_out, GLOBAL(clk), VCC, , , , , , );


--B1L501 is memTest:memt|state_r~368 at LC_X15_Y6_N1
--operation mode is normal

B1L501 = rst_n & (bt_doAgain_n # !B1_state_r.stop);


--B1L37 is memTest:memt|reduce_or~562 at LC_X20_Y6_N0
--operation mode is normal

B1L37 = B1_addr_r[17] & (B1_addr_r[11]);


--B1L47 is memTest:memt|reduce_or~563 at LC_X20_Y6_N1
--operation mode is normal

B1L47 = B1_addr_r[19] & B1_addr_r[20] & B1_addr_r[9] & B1_addr_r[13];


--B1L57 is memTest:memt|reduce_or~564 at LC_X20_Y6_N4
--operation mode is normal

B1L57 = B1_addr_r[8] & B1L37 & B1_addr_r[16] & B1L47;


--B1L67 is memTest:memt|reduce_or~565 at LC_X20_Y7_N9
--operation mode is normal

B1L67 = B1_addr_r[18] & B1_addr_r[15] & B1_addr_r[12] & B1_addr_r[10];


--B1_addr_r[0] is memTest:memt|addr_r[0] at LC_X21_Y8_N4
--operation mode is arithmetic

B1_addr_r[0]_lut_out = !B1_addr_r[0];
B1_addr_r[0] = DFFEAS(B1_addr_r[0]_lut_out, GLOBAL(clk), VCC, , B1L82, , , B1L81, );

--B1L3 is memTest:memt|addr_r[0]~377 at LC_X21_Y8_N4
--operation mode is arithmetic

B1L3 = CARRY(B1_addr_r[0]);


--B1_addr_r[1] is memTest:memt|addr_r[1] at LC_X21_Y8_N5
--operation mode is arithmetic

B1_addr_r[1]_carry_eqn = B1L3;
B1_addr_r[1]_lut_out = B1_addr_r[1] $ B1_addr_r[1]_carry_eqn;
B1_addr_r[1] = DFFEAS(B1_addr_r[1]_lut_out, GLOBAL(clk), VCC, , B1L82, , , B1L81, );

--B1L5 is memTest:memt|addr_r[1]~381 at LC_X21_Y8_N5
--operation mode is arithmetic

B1L5_cout_0 = !B1L3 # !B1_addr_r[1];
B1L5 = CARRY(B1L5_cout_0);

--B1L6 is memTest:memt|addr_r[1]~381COUT1_415 at LC_X21_Y8_N5
--operation mode is arithmetic

B1L6_cout_1 = !B1L3 # !B1_addr_r[1];
B1L6 = CARRY(B1L6_cout_1);


--B1L77 is memTest:memt|reduce_or~566 at LC_X21_Y8_N1
--operation mode is normal

B1L77 = B1_addr_r[14] & B1_addr_r[21] & B1_addr_r[0] & B1_addr_r[1];


--B1_addr_r[6] is memTest:memt|addr_r[6] at LC_X21_Y7_N0
--operation mode is arithmetic

B1_addr_r[6]_carry_eqn = B1L71;
B1_addr_r[6]_lut_out = B1_addr_r[6] $ !B1_addr_r[6]_carry_eqn;
B1_addr_r[6] = DFFEAS(B1_addr_r[6]_lut_out, GLOBAL(clk), VCC, , B1L82, , , B1L81, );

--B1L02 is memTest:memt|addr_r[6]~385 at LC_X21_Y7_N0
--operation mode is arithmetic

B1L02_cout_0 = B1_addr_r[6] & !B1L71;
B1L02 = CARRY(B1L02_cout_0);

--B1L12 is memTest:memt|addr_r[6]~385COUT1_419 at LC_X21_Y7_N0
--operation mode is arithmetic

B1L12_cout_1 = B1_addr_r[6] & !B1L71;
B1L12 = CARRY(B1L12_cout_1);


--B1_addr_r[7] is memTest:memt|addr_r[7] at LC_X21_Y7_N1
--operation mode is arithmetic

B1_addr_r[7]_carry_eqn = (!B1L71 & B1L02) # (B1L71 & B1L12);
B1_addr_r[7]_lut_out = B1_addr_r[7] $ (B1_addr_r[7]_carry_eqn);
B1_addr_r[7] = DFFEAS(B1_addr_r[7]_lut_out, GLOBAL(clk), VCC, , B1L82, , , B1L81, );

--B1L32 is memTest:memt|addr_r[7]~389 at LC_X21_Y7_N1
--operation mode is arithmetic

B1L32_cout_0 = !B1L02 # !B1_addr_r[7];
B1L32 = CARRY(B1L32_cout_0);

--B1L42 is memTest:memt|addr_r[7]~389COUT1_420 at LC_X21_Y7_N1
--operation mode is arithmetic

B1L42_cout_1 = !B1L12 # !B1_addr_r[7];
B1L42 = CARRY(B1L42_cout_1);


--B1_addr_r[2] is memTest:memt|addr_r[2] at LC_X21_Y8_N6
--operation mode is arithmetic

B1_addr_r[2]_carry_eqn = (!B1L3 & B1L5) # (B1L3 & B1L6);
B1_addr_r[2]_lut_out = B1_addr_r[2] $ (!B1_addr_r[2]_carry_eqn);
B1_addr_r[2] = DFFEAS(B1_addr_r[2]_lut_out, GLOBAL(clk), VCC, , B1L82, , , B1L81, );

--B1L8 is memTest:memt|addr_r[2]~393 at LC_X21_Y8_N6
--operation mode is arithmetic

B1L8_cout_0 = B1_addr_r[2] & (!B1L5);
B1L8 = CARRY(B1L8_cout_0);

--B1L9 is memTest:memt|addr_r[2]~393COUT1_416 at LC_X21_Y8_N6
--operation mode is arithmetic

B1L9_cout_1 = B1_addr_r[2] & (!B1L6);
B1L9 = CARRY(B1L9_cout_1);


--B1_addr_r[3] is memTest:memt|addr_r[3] at LC_X21_Y8_N7
--operation mode is arithmetic

B1_addr_r[3]_carry_eqn = (!B1L3 & B1L8) # (B1L3 & B1L9);
B1_addr_r[3]_lut_out = B1_addr_r[3] $ (B1_addr_r[3]_carry_eqn);
B1_addr_r[3] = DFFEAS(B1_addr_r[3]_lut_out, GLOBAL(clk), VCC, , B1L82, , , B1L81, );

--B1L11 is memTest:memt|addr_r[3]~397 at LC_X21_Y8_N7
--operation mode is arithmetic

B1L11_cout_0 = !B1L8 # !B1_addr_r[3];
B1L11 = CARRY(B1L11_cout_0);

--B1L21 is memTest:memt|addr_r[3]~397COUT1_417 at LC_X21_Y8_N7
--operation mode is arithmetic

B1L21_cout_1 = !B1L9 # !B1_addr_r[3];
B1L21 = CARRY(B1L21_cout_1);


--B1_addr_r[4] is memTest:memt|addr_r[4] at LC_X21_Y8_N8
--operation mode is arithmetic

B1_addr_r[4]_carry_eqn = (!B1L3 & B1L11) # (B1L3 & B1L21);
B1_addr_r[4]_lut_out = B1_addr_r[4] $ !B1_addr_r[4]_carry_eqn;
B1_addr_r[4] = DFFEAS(B1_addr_r[4]_lut_out, GLOBAL(clk), VCC, , B1L82, , , B1L81, );

--B1L41 is memTest:memt|addr_r[4]~401 at LC_X21_Y8_N8
--operation mode is arithmetic

B1L41_cout_0 = B1_addr_r[4] & !B1L11;
B1L41 = CARRY(B1L41_cout_0);

--B1L51 is memTest:memt|addr_r[4]~401COUT1_418 at LC_X21_Y8_N8
--operation mode is arithmetic

B1L51_cout_1 = B1_addr_r[4] & !B1L21;
B1L51 = CARRY(B1L51_cout_1);


--B1_addr_r[5] is memTest:memt|addr_r[5] at LC_X21_Y8_N9
--operation mode is arithmetic

B1_addr_r[5]_carry_eqn = (!B1L3 & B1L41) # (B1L3 & B1L51);
B1_addr_r[5]_lut_out = B1_addr_r[5] $ (B1_addr_r[5]_carry_eqn);
B1_addr_r[5] = DFFEAS(B1_addr_r[5]_lut_out, GLOBAL(clk), VCC, , B1L82, , , B1L81, );

--B1L71 is memTest:memt|addr_r[5]~405 at LC_X21_Y8_N9
--operation mode is arithmetic

B1L71 = CARRY(!B1L51 # !B1_addr_r[5]);


--B1L87 is memTest:memt|reduce_or~567 at LC_X21_Y8_N3
--operation mode is normal

B1L87 = B1_addr_r[3] & B1_addr_r[4] & B1_addr_r[5] & B1_addr_r[2];


--B1_addr_r[22] is memTest:memt|addr_r[22] at LC_X21_Y6_N6
--operation mode is normal

B1_a