sdram_tb.fit.eqn

SDRAM IPCore控制程序源代码。 请问有无usb原码

--operation mode is normal

C1_state_r.initpchg_lut_out = C1L953 & C1L933 & C1L02 & !C1_state_r.initpchg;
C1_state_r.initpchg = DFFEAS(C1_state_r.initpchg_lut_out, GLOBAL(clk), GLOBAL(rst_n), , C1L463, , , , );


--C1_state_r.activate is sdramCntl:sdram1|state_r.activate at LC_X22_Y10_N9
--operation mode is normal

C1_state_r.activate_lut_out = C1L833 & !C1L421 & C1L331;
C1_state_r.activate = DFFEAS(C1_state_r.activate_lut_out, GLOBAL(clk), GLOBAL(rst_n), , !C1L332, , , , );


--C1L121 is sdramCntl:sdram1|cmd_x[5]~958 at LC_X24_Y6_N6
--operation mode is normal

C1L121 = !C1_state_r.activate & !C1_state_r.initpchg;


--C1L573 is sdramCntl:sdram1|status[1]~799 at LC_X22_Y10_N0
--operation mode is normal

C1L573 = !C1L332 & (C1L833 # !C1L121 # !C1L02);


--C1L183 is sdramCntl:sdram1|status~800 at LC_X22_Y6_N6
--operation mode is normal

C1_rdPipeline_r[0]_qfbk = C1_rdPipeline_r[0];
C1L183 = !C1_wrPipeline_r[0] & !C1_rdPipeline_r[0]_qfbk & (B1_state_r.load # B1_state_r.compare);

--C1_rdPipeline_r[0] is sdramCntl:sdram1|rdPipeline_r[0] at LC_X22_Y6_N6
--operation mode is normal

C1_rdPipeline_r[0] = DFFEAS(C1L183, GLOBAL(clk), GLOBAL(rst_n), , , C1_rdPipeline_r[1], , , VCC);


--C1L673 is sdramCntl:sdram1|status[2]~801 at LC_X22_Y8_N9
--operation mode is normal

C1L673 = C1_state_r.rw & (C1L322 # C1L183);


--C1_state_r.selfrefresh is sdramCntl:sdram1|state_r.selfrefresh at LC_X25_Y8_N6
--operation mode is normal

C1_state_r.selfrefresh_lut_out = C1L563 & (C1_state_r.selfrefresh # C1L331 & C1L812);
C1_state_r.selfrefresh = DFFEAS(C1_state_r.selfrefresh_lut_out, GLOBAL(clk), GLOBAL(rst_n), , !C1L332, , , , );


--C1L773 is sdramCntl:sdram1|status[2]~802 at LC_X24_Y7_N8
--operation mode is normal

C1L773 = !C1L332 & (C1L673 # C1_state_r.selfrefresh # C1_state_r.initsetmode);


--C1L873 is sdramCntl:sdram1|status[3]~803 at LC_X24_Y7_N1
--operation mode is normal

C1L873 = C1_state_r.selfrefresh # C1_state_r.activate # C1_state_r.refreshrow;


--C1L812 is sdramCntl:sdram1|rdPipeline_x[4]~17 at LC_X25_Y9_N8
--operation mode is normal

C1L812 = C1_state_r.rw & (!C1L322);


--C1L973 is sdramCntl:sdram1|status[3]~804 at LC_X24_Y7_N2
--operation mode is normal

C1L973 = !C1L332 & (C1L873 # !C1L183 & C1L812);


--C1_cmd_r[6] is sdramCntl:sdram1|cmd_r[6] at LC_X24_Y7_N7
--operation mode is normal

C1_cmd_r[6]_lut_out = !C1L363 & C1L221 & (!C1L663 # !C1_state_r.rw);
C1_cmd_r[6] = DFFEAS(C1_cmd_r[6]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1_cmd_r[5] is sdramCntl:sdram1|cmd_r[5] at LC_X24_Y6_N0
--operation mode is normal

C1_cmd_r[5]_lut_out = C1L121 & !C1L321 & C1L001 & C1L043;
C1_cmd_r[5] = DFFEAS(C1_cmd_r[5]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1_cmd_r[4] is sdramCntl:sdram1|cmd_r[4] at LC_X23_Y6_N6
--operation mode is normal

C1_cmd_r[4]_lut_out = !C1L332 & !C1L711 & !C1L021 & !C1L811;
C1_cmd_r[4] = DFFEAS(C1_cmd_r[4]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1_ba_r[0] is sdramCntl:sdram1|ba_r[0] at LC_X20_Y7_N8
--operation mode is normal

C1_ba_r[0]_lut_out = GND;
C1_ba_r[0] = DFFEAS(C1_ba_r[0]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , B1_addr_r[20], , , VCC);


--C1_ba_r[1] is sdramCntl:sdram1|ba_r[1] at LC_X21_Y6_N9
--operation mode is normal

C1_ba_r[1]_lut_out = B1_addr_r[21];
C1_ba_r[1] = DFFEAS(C1_ba_r[1]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1_sAddr_r[0] is sdramCntl:sdram1|sAddr_r[0] at LC_X24_Y7_N0
--operation mode is normal

C1_sAddr_r[0]_lut_out = C1_state_r.activate & (B1_addr_r[8]) # !C1_state_r.activate & C1L243;
C1_sAddr_r[0] = DFFEAS(C1_sAddr_r[0]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , B1_addr_r[0], , , C1L332);


--C1_sAddr_r[1] is sdramCntl:sdram1|sAddr_r[1] at LC_X20_Y8_N6
--operation mode is normal

C1_sAddr_r[1]_lut_out = C1_state_r.activate & B1_addr_r[9] # !C1_state_r.activate & (C1L343);
C1_sAddr_r[1] = DFFEAS(C1_sAddr_r[1]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , B1_addr_r[1], , , C1L332);


--C1_sAddr_r[2] is sdramCntl:sdram1|sAddr_r[2] at LC_X20_Y8_N2
--operation mode is normal

C1_sAddr_r[2]_lut_out = C1_state_r.activate & (B1_addr_r[10]) # !C1_state_r.activate & C1L443;
C1_sAddr_r[2] = DFFEAS(C1_sAddr_r[2]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , B1_addr_r[2], , , C1L332);


--C1_sAddr_r[3] is sdramCntl:sdram1|sAddr_r[3] at LC_X20_Y8_N7
--operation mode is normal

C1_sAddr_r[3]_lut_out = C1_state_r.activate & (B1_addr_r[11]) # !C1_state_r.activate & C1L543;
C1_sAddr_r[3] = DFFEAS(C1_sAddr_r[3]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , B1_addr_r[3], , , C1L332);


--C1_sAddr_r[4] is sdramCntl:sdram1|sAddr_r[4] at LC_X22_Y7_N5
--operation mode is normal

C1_sAddr_r[4]_lut_out = C1L692 & (B1_addr_r[4]) # !C1L692 & (B1_addr_r[12] # !C1_state_r.activate);
C1_sAddr_r[4] = DFFEAS(C1_sAddr_r[4]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1_sAddr_r[5] is sdramCntl:sdram1|sAddr_r[5] at LC_X22_Y7_N2
--operation mode is normal

C1_sAddr_r[5]_lut_out = C1L692 & (B1_addr_r[5]) # !C1L692 & (B1_addr_r[13] # !C1_state_r.activate);
C1_sAddr_r[5] = DFFEAS(C1_sAddr_r[5]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1_sAddr_r[6] is sdramCntl:sdram1|sAddr_r[6] at LC_X20_Y8_N3
--operation mode is normal

C1_sAddr_r[6]_lut_out = C1_state_r.activate & B1_addr_r[14] # !C1_state_r.activate & (C1L643);
C1_sAddr_r[6] = DFFEAS(C1_sAddr_r[6]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , B1_addr_r[6], , , C1L332);


--C1_sAddr_r[7] is sdramCntl:sdram1|sAddr_r[7] at LC_X20_Y8_N9
--operation mode is normal

C1_sAddr_r[7]_lut_out = C1_state_r.activate & (B1_addr_r[15]) # !C1_state_r.activate & C1L743;
C1_sAddr_r[7] = DFFEAS(C1_sAddr_r[7]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , B1_addr_r[7], , , C1L332);


--C1_sAddr_r[8] is sdramCntl:sdram1|sAddr_r[8] at LC_X22_Y7_N9
--operation mode is normal

C1_sAddr_r[8]_lut_out = !C1L532 & !C1L432 & C1_state_r.activate & B1_addr_r[16];
C1_sAddr_r[8] = DFFEAS(C1_sAddr_r[8]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1_sAddr_r[9] is sdramCntl:sdram1|sAddr_r[9] at LC_X22_Y7_N8
--operation mode is normal

C1_sAddr_r[9]_lut_out = !C1L532 & C1_state_r.activate & B1_addr_r[17] & !C1L432;
C1_sAddr_r[9] = DFFEAS(C1_sAddr_r[9]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1_sAddr_r[10] is sdramCntl:sdram1|sAddr_r[10] at LC_X20_Y7_N2
--operation mode is normal

C1_sAddr_r[10]_lut_out = !C1L332 & (C1L303 # C1L143 & C1L403);
C1_sAddr_r[10] = DFFEAS(C1_sAddr_r[10]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1_sAddr_r[11] is sdramCntl:sdram1|sAddr_r[11] at LC_X22_Y7_N7
--operation mode is normal

C1_sAddr_r[11]_lut_out = !C1L532 & C1_state_r.activate & B1_addr_r[19] & !C1L432;
C1_sAddr_r[11] = DFFEAS(C1_sAddr_r[11]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--C1_cmd_r[3] is sdramCntl:sdram1|cmd_r[3] at LC_X25_Y8_N7
--operation mode is normal

C1_cmd_r[3]_lut_out = C1L311 # C1L211 # C1_state_r.initrfsh & !C1L332;
C1_cmd_r[3] = DFFEAS(C1_cmd_r[3]_lut_out, GLOBAL(clk), GLOBAL(rst_n), , , , , , );


--B1_err is memTest:memt|err at LC_X15_Y6_N5
--operation mode is normal

B1_err_lut_out = B1L86 # B1_state_r.compare & C1_done & B1L001;
B1_err = DFFEAS(B1_err_lut_out, GLOBAL(clk), VCC, , rst_n, , , , );


--C1L653 is sdramCntl:sdram1|state_r.rw~138 at LC_X25_Y8_N4
--operation mode is normal

C1L653 = C1_state_r.refreshrow # C1_state_r.initsetmode # C1_state_r.activate # C1_state_r.selfrefresh;


--B1_addr_r[17] is memTest:memt|addr_r[17] at LC_X21_Y6_N1
--operation mode is arithmetic

B1_addr_r[17]_carry_eqn = (!B1L74 & B1L94) # (B1L74 & B1L05);
B1_addr_r[17]_lut_out = B1_addr_r[17] $ (B1_addr_r[17]_carry_eqn);
B1_addr_r[17] = DFFEAS(B1_addr_r[17]_lut_out, GLOBAL(clk), VCC, , B1L82, , , B1L81, );

--B1L25 is memTest:memt|addr_r[17]~321 at LC_X21_Y6_N1
--operation mode is arithmetic

B1L25_cout_0 = !B1L94 # !B1_addr_r[17];
B1L25 = CARRY(B1L25_cout_0);

--B1L35 is memTest:memt|addr_r[17]~321COUT1_428 at LC_X21_Y6_N1
--operation mode is arithmetic

B1L35_cout_1 = !B1L05 # !B1_addr_r[17];
B1L35 = CARRY(B1L35_cout_1);


--B1_addr_r[11] is memTest:memt|addr_r[11] at LC_X21_Y7_N5
--operation mode is arithmetic

B1_addr_r[11]_carry_eqn = B1L33;
B1_addr_r[11]_lut_out = B1_addr_r[11] $ B1_addr_r[11]_carry_eqn;
B1_addr_r[11] = DFFEAS(B1_addr_r[11]_lut_out, GLOBAL(clk), VCC, , B1L82, , , B1L81, );

--B1L53 is memTest:memt|addr_r[11]~325 at LC_X21_Y7_N5
--operation mode is arithmetic

B1L53_cout_0 = !B1L33 # !B1_addr_r[11];
B1L53 = CARRY(B1L53_cout_0);

--B1L63 is memTest:memt|addr_r[11]~325COUT1_423 at LC_X21_Y7_N5
--operation mode is arithmetic

B1L63_cout_1 = !B1L33 # !B1_addr_r[11];
B1L63 = CARRY(B1L63_cout_1);


--C1_activeRow_r[0][9] is sdramCntl:sdram1|activeRow_r[0][9] at LC_X20_Y6_N3
--operation mode is normal

C1_activeRow_r[0][9]_lut_out = B1_addr_r[17];
C1_activeRow_r[0][9] = DFFEAS(C1_activeRow_r[0][9]_lut_out, GLOBAL(clk), VCC, , C1L8, , , , );


--C1L521 is sdramCntl:sdram1|combinatorial~153 at LC_X20_Y6_N7
--operation mode is normal

C1_activeRow_r[0][3]_qfbk = C1_activeRow_r[0][3];
C1L521 = B1_addr_r[17] & C1_activeRow_r[0][9] & (B1_addr_r[11] $ !C1_activeRow_r[0][3]_qfbk) # !B1_addr_r[17] & !C1_activeRow_r[0][9] & (B1_addr_r[11] $ !C1_activeRow_r[0][3]_qfbk);

--C1_activeRow_r[0][3] is sdramCntl:sdram1|activeRow_r[0][3] at LC_X20_Y6_N7
--operation mode is normal

C1_activeRow_r[0][3] = DFFEAS(C1L521, GLOBAL(clk), VCC, , C1L8, B1_addr_r[11], , , VCC);


--B1_addr_r[16] is memTest:memt|addr_r[16] at LC_X21_Y6_N0
--operation mode is arithmetic

B1_addr_r[16]_carry_eqn = B1L74;
B1_addr_r[16]_lut_out = B1_addr_r[16] $ !B1_addr_r[16]_carry_eqn;
B1_addr_r[16] = DFFEAS(B1_addr_r[16]_lut_out, GLOBAL(clk), VCC, , B1L82, , , B1L81, );

--B1L94 is memTest:memt|addr_r[16]~329 at LC_X21_Y6_N0
--operation mode is arithmetic

B1L94_cout_0 = B1_addr_r[16] & !B1L74;
B1L94 = CARRY(B1L94_cout_0);

--B1L05 is memTest:memt|addr_r[16]~329COUT1_427 at LC_X21_Y6_N0
--operation mode is arithmetic

B1L05_cout_1 = B1_addr_r[16] & !B1L74;
B1L05 = CARRY(B1L05_cout_1);


--B1_addr_r[8] is memTest:memt|addr_r[8] at LC_X21_Y7_N2
--operation mode is arithmetic

B1_addr_r[8]_carry_eqn = (!B1L71 & B1L32) # (B1L71 & B1L42);
B1_addr_r[8]_lut_out = B1_addr_r[8] $ (!B1_addr_r[8]_carry_eqn);
B1_addr_r[8] = DFFEAS(B1_addr_r[8]_lut_out, GLOBAL(clk), VCC, , B1L82, , , B1L81, );

--B1L62 is memTest:memt|addr_r[8]~333 at LC_X21_Y7_N2
--operation mode is arithmetic

B1L62_cout_0 = B1_addr_r[8] & (!B1L32);
B1L62 = CARRY(B1L62_cout_0);

--B1L72 is memTest:memt|addr_r[8]~333COUT1_421 at LC_X21_Y7_N2
--operation mode is arithmetic

B1L72_cout_1 = B1_addr_r[8] & (!B1L42);
B1L72 = CARRY(B1L72_cout_1);


--C1_activeRow_r[0][8] is sdramCntl:sdram1|activeRow_r[0][8] at LC_X22_Y7_N0
--operation mode is normal

C1_activeRow_r[0][8]_lut_out = B1_addr_r[16];
C1_activeRow_r[0][8] = DFFEAS(C1_activeRow_r[0][8]_lut_out, GLOBAL(clk), VCC, , C1L8, , , , );


--C1L621 is sdramCntl:sdram1|combinatorial~154 at LC_X22_Y7_N6
--operation mode is normal

C1_activeRow_r[0][0]_qfbk = C1_activeRow_r[0][0];
C1L621 = B1_addr_r[8] & C1_activeRow_r[0][0]_qfbk & (B1_addr_r[16] $ !C1_activeRow_r[0][8]) # !B1_addr_r[8] & !C1_activeRow_r[0][0]_qfbk & (B1_addr_r[16] $ !C1_activeRow_r[0][8]);

--C1_activeRow_r[0][0] is sdramCntl:sdram1|activeRow_r[0][0] at LC_X22_Y7_N6
--operation mode is normal

C1_activeRow_r[0][0] = DFFEAS(C1L621, GLOBAL(clk), VCC, , C1L8, B1_addr_r[8], , , VCC);


--B1_addr_r[13] is memTest:memt|addr_r[13] at LC_X21_Y7_N7
--operation mode is arithmetic

B1_addr_r[13]_carry_eqn = (!B1L33 & B1L83) # (B1L33 & B1L93);
B1_addr_r[13]_lut_out = B1_addr_r[13] $ (B1_addr_r[13]_carry_eqn);
B1_addr_r[13] = DFFEAS(B1_addr_r[13]_lut_out, GLOBAL(clk), VCC, , B1L82, , , B1L81, );

--B1L14 is memTest:memt|addr_r[13]~337 at LC_X21_Y7_N7
--operation mode is arithmetic

B1L14_cout_0 = !B1L83 # !B1_addr_r[13];
B1L14 = CARRY(B1L14_cout_0);

--B1L24 is memTest:memt|addr_r[13]~337COUT1_425 at LC_X21_Y7_N7
--operation mode is arithmetic

B1L24_cout_1 = !B1L93 # !B1_addr_r[13];
B1L24 = CARRY(B1L24_cout_1);


--B1_addr_r[20] is memTest:memt|addr_r[20] at LC_X21_Y6_N4
--operation mode is arithmetic

B1_addr_r[20]_carry_eqn = (!B1L74 & B1L85) # (B1L74 & B1L95);
B1_addr_r[20]_lut_out = B1_addr_r[20] $ !B1_addr_r[20]_carry_eqn;
B1_addr_r[20] = DFFEAS(B1_addr_r[20]_lut_out, GLOBAL(clk), VCC, , B1L82, , , B1L81, );

--B1L16 is memTest:memt|addr_r[20]~341 at LC_X21_Y6_N4
--operation mode is arithmetic

B1L16 = CARRY(B1_addr_r[20] & !B1L95);


--C1_activeRow_r[0][5] is sdramCntl:sdram1|activeRow_r[0][5] at LC_X20_Y7_N5
--operation mode is normal

C1_activeRow_r[0][5]_lut_out = GND;
C1_activeRow_r[0][5] = DFFEAS(C1_activeRow_r[0][5]_lut_out, GLOBAL(clk), VCC, , C1L8, B1_addr_r[13], , , VCC);


--C1L721 is sdramCntl:sdram1|combinatorial~155 at LC_X20_Y7_N7
--operation mode is normal

C1_activeBank_r[0]_qfbk = C1_activeBank_r[0];
C1L721 = B1_addr_r[13] & C1_activeRow_r[0][5] & (B1_addr_r[20] $ !C1_activeBank_r[0]_qfbk) # !B1_addr_r[13] & !C1_activeRow_r[0][5] & (B1_addr_r[20] $ !C1_activeBank_r[0]_qfbk);

--C1_activeBank_r[0] is sdramCntl:sdram1|activeBank_r[0] at LC_X20_Y7_N7
--operation mode is normal

C1_activeBank_r[0] = DFFEAS(C1L721, GLOBAL(clk), VCC, , C1L8, B1_addr_r[20], , , VCC);


--B1_addr_r[9] is memTest:memt|addr_r[9] at LC_X21_Y7_N3
--operation mode is arithmetic