sdram_tb.map.rpt

SDRAM IPCore控制程序源代码。 请问有无usb原码

Info: Elaborating entity "memTest" for hierarchy "memTest:memt"
Info: Elaborating entity "randGen" for hierarchy "memTest:memt|randGen:u0"
Info: Elaborating entity "sdramCntl" for hierarchy "sdramCntl:sdram1"
Warning: VHDL Process Statement warning at sdramcntl.vhd(294): signal "activeBank_r" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(307): signal "ba_x" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(317): signal "col" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(318): signal "col" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(331): signal "rdInProgress" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(364): signal "bank" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(364): signal "activeBank_r" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(364): signal "row" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(364): signal "bankIndex" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(502): signal "activateInProgress" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(502): signal "wrInProgress" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(502): signal "rdInProgress" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(516): signal "ba_x" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(516): signal "ba_r" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(518): signal "doActivate" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(520): signal "activateInProgress" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(520): signal "wrInProgress" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(520): signal "rdInProgress" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(524): signal "bankIndex" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(530): signal "rdInProgress" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(545): signal "ba_x" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(545): signal "ba_r" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(547): signal "doActivate" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(549): signal "activateInProgress" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(549): signal "wrInProgress" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(549): signal "rdInProgress" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(553): signal "bankIndex" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(557): signal "rdInProgress" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(573): signal "doSelfRfsh" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(575): signal "activateInProgress" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(575): signal "wrInProgress" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(575): signal "rdInProgress" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(597): signal "row" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(598): signal "bank" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(599): signal "row" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(599): signal "bankIndex" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(600): signal "bankIndex" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at sdramcntl.vhd(620): signal "doSelfRfsh" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Info: VHDL Case Statement information at sdramcntl.vhd(637): OTHERS choice is never selected
Warning: Reduced register "sdramCntl:sdram1|cmd_r[7]" with stuck data_in port to stuck value GND
Info: Duplicate registers merged to single register
    Info: Duplicate register "sdramCntl:sdram1|cmd_r[0]" merged to single register "sdramCntl:sdram1|cmd_r[3]"
    Info: Duplicate register "sdramCntl:sdram1|cmd_r[2]" merged to single register "sdramCntl:sdram1|cmd_r[3]"
    Info: Duplicate register "sdramCntl:sdram1|cmd_r[1]" merged to single register "sdramCntl:sdram1|cmd_r[3]"
Info: Duplicate registers merged to single register
    Info: Duplicate register "sdramCntl:sdram1|wrTimer_r" merged to single register "sdramCntl:sdram1|wrPipeline_r[0]"
Info: State machine "|sdram_tb|sdramCntl:sdram1|state_r" contains 8 states and 0 state bits
Info: State machine "|sdram_tb|memTest:memt|state_r" contains 5 states and 0 state bits
Info: Selected Auto state machine encoding method for state machine "|sdram_tb|sdramCntl:sdram1|state_r"
Info: Encoding result for state machine "|sdram_tb|sdramCntl:sdram1|state_r"
    Info: Completed encoding using 8 state bits
        Info: Encoded state bit "sdramCntl:sdram1|state_r.selfrefresh"
        Info: Encoded state bit "sdramCntl:sdram1|state_r.refreshrow"
        Info: Encoded state bit "sdramCntl:sdram1|state_r.activate"
        Info: Encoded state bit "sdramCntl:sdram1|state_r.rw"
        Info: Encoded state bit "sdramCntl:sdram1|state_r.initrfsh"
        Info: Encoded state bit "sdramCntl:sdram1|state_r.initsetmode"
        Info: Encoded state bit "sdramCntl:sdram1|state_r.initpchg"
        Info: Encoded state bit "sdramCntl:sdram1|state_r.initwait"
    Info: State "|sdram_tb|sdramCntl:sdram1|state_r.initwait" uses code string "00000000"
    Info: State "|sdram_tb|sdramCntl:sdram1|state_r.initpchg" uses code string "00000011"
    Info: State "|sdram_tb|sdramCntl:sdram1|state_r.initsetmode" uses code string "00000101"
    Info: State "|sdram_tb|sdramCntl:sdram1|state_r.initrfsh" uses code string "00001001"
    Info: State "|sdram_tb|sdramCntl:sdram1|state_r.rw" uses code string "00010001"
    Info: State "|sdram_tb|sdramCntl:sdram1|state_r.activate" uses code string "00100001"
    Info: State "|sdram_tb|sdramCntl:sdram1|state_r.refreshrow" uses code string "01000001"
    Info: State "|sdram_tb|sdramCntl:sdram1|state_r.selfrefresh" uses code string "10000001"
Info: Selected Auto state machine encoding method for state machine "|sdram_tb|memTest:memt|state_r"
Info: Encoding result for state machine "|sdram_tb|memTest:memt|state_r"
    Info: Completed encoding using 5 state bits
        Info: Encoded state bit "memTest:memt|state_r.stop"
        Info: Encoded state bit "memTest:memt|state_r.empty_pipe"
        Info: Encoded state bit "memTest:memt|state_r.compare"
        Info: Encoded state bit "memTest:memt|state_r.load"
        Info: Encoded state bit "memTest:memt|state_r.init"
    Info: State "|sdram_tb|memTest:memt|state_r.init" uses code string "00000"
    Info: State "|sdram_tb|memTest:memt|state_r.load" uses code string "00011"
    Info: State "|sdram_tb|memTest:memt|state_r.compare" uses code string "00101"
    Info: State "|sdram_tb|memTest:memt|state_r.empty_pipe" uses code string "01001"
    Info: State "|sdram_tb|memTest:memt|state_r.stop" uses code string "10001"
Warning: Reduced register "memTest:memt|state_r.empty_pipe" with stuck data_in port to stuck value GND
Info: One or more bidirs are fed by always enabled tri-state buffers
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[0]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[1]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[2]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[3]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[4]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[5]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[6]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[7]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[8]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[9]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[10]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[11]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[12]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[13]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[14]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[15]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[16]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[17]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[18]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[19]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[20]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[21]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[22]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[23]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[24]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[25]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[26]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[27]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[28]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[29]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[30]" is moved to its source
    Info: Fanout of permanently enabled tri-state buffer feeding bidir "sD[31]" is moved to its source
Warning: TRI or OPNDRN buffers permanently enabled
    Warning: Node "sD[0]~32"
    Warning: Node "sD[1]~33"
    Warning: Node "sD[2]~34"
    Warning: Node "sD[3]~35"
    Warning: Node "sD[4]~36"
    Warning: Node "sD[5]~37"
    Warning: Node "sD[6]~38"
    Warning: Node "sD[7]~39"
    Warning: Node "sD[8]~40"
    Warning: Node "sD[9]~41"
    Warning: Node "sD[10]~42"
    Warning: Node "sD[11]~43"
    Warning: Node "sD[12]~44"
    Warning: Node "sD[13]~45"
    Warning: Node "sD[14]~46"
    Warning: Node "sD[15]~47"
    Warning: Node "sD[16]~48"
    Warning: Node "sD[17]~49"
    Warning: Node "sD[18]~50"
    Warning: Node "sD[19]~51"
    Warning: Node "sD[20]~52"
    Warning: Node "sD[21]~53"
    Warning: Node "sD[22]~54"
    Warning: Node "sD[23]~55"
    Warning: Node "sD[24]~56"
    Warning: Node "sD[25]~57"
    Warning: Node "sD[26]~58"
    Warning: Node "sD[27]~59"
    Warning: Node "sD[28]~60"
    Warning: Node "sD[29]~61"
    Warning: Node "sD[30]~62"
    Warning: Node "sD[31]~63"
Warning: Output pins are stuck at VCC or GND
    Warning: Pin "led_opBegun" stuck at GND
    Warning: Pin "led_rdPending" stuck at GND
    Warning: Pin "led_done" stuck at GND
    Warning: Pin "led_rdDone" stuck at GND
    Warning: Pin "ce_n" stuck at GND
    Warning: Pin "LD[0]" stuck at VCC
    Warning: Pin "LD[3]" stuck at VCC
    Warning: Pin "LD[4]" stuck at VCC
    Warning: Pin "LD[5]" stuck at VCC
Info: Registers with preset signals will power-up high
Info: Implemented 476 device resources after synthesis - the final resource count might be different
    Info: Implemented 3 input pins
    Info: Implemented 38 output pins
    Info: Implemented 32 bidirectional pins
    Info: Implemented 403 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 87 warnings
    Info: Processing ended: Thu Nov 03 20:10:46 2005
    Info: Elapsed time: 00:00:09