📄 freqtest.rpt
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_EQ056 = !_LC1_A24 & !_LC2_A24 & _LC3_A24 & _LC5_A24;
-- Node name is '|COUNTER32B:9|:12' = '|COUNTER32B:9|CQI0'
-- Equation name is '_LC2_A25', type is buried
_LC2_A25 = DFFE( _EQ057, _LC4_A24, !_LC2_A36, VCC, VCC);
_EQ057 = !_LC2_A25 & _LC3_A36 & _LC6_A25
# _LC2_A25 & !_LC3_A36;
-- Node name is '|COUNTER32B:9|:11' = '|COUNTER32B:9|CQI1'
-- Equation name is '_LC3_A25', type is buried
_LC3_A25 = DFFE( _EQ058, _LC4_A24, !_LC2_A36, VCC, VCC);
_EQ058 = !_LC2_A25 & _LC3_A25 & _LC6_A25
# _LC2_A25 & !_LC3_A25 & _LC3_A36 & _LC6_A25
# _LC3_A25 & !_LC3_A36;
-- Node name is '|COUNTER32B:9|:10' = '|COUNTER32B:9|CQI2'
-- Equation name is '_LC4_A25', type is buried
_LC4_A25 = DFFE( _EQ059, _LC4_A24, !_LC2_A36, VCC, VCC);
_EQ059 = _LC4_A25 & _LC6_A25 & !_LC7_A25
# _LC3_A36 & !_LC4_A25 & _LC6_A25 & _LC7_A25
# !_LC3_A36 & _LC4_A25;
-- Node name is '|COUNTER32B:9|:9' = '|COUNTER32B:9|CQI3'
-- Equation name is '_LC5_A25', type is buried
_LC5_A25 = DFFE( _EQ060, _LC4_A24, !_LC2_A36, VCC, VCC);
_EQ060 = _LC3_A36 & _LC6_A25 & _LC8_A25
# !_LC3_A36 & _LC5_A25;
-- Node name is '|COUNTER32B:9|LPM_ADD_SUB:82|addcore:adder|:59' from file "addcore.tdf" line 312, column 64
-- Equation name is '_LC7_A25', type is buried
_LC7_A25 = LCELL( _EQ061);
_EQ061 = _LC2_A25 & _LC3_A25;
-- Node name is '|COUNTER32B:9|LPM_ADD_SUB:82|addcore:adder|:77' from file "addcore.tdf" line 316, column 45
-- Equation name is '_LC8_A25', type is buried
_LC8_A25 = LCELL( _EQ062);
_EQ062 = !_LC3_A25 & _LC5_A25
# !_LC2_A25 & _LC5_A25
# !_LC4_A25 & _LC5_A25
# _LC2_A25 & _LC3_A25 & _LC4_A25 & !_LC5_A25;
-- Node name is '|COUNTER32B:9|:48'
-- Equation name is '_LC6_A25', type is buried
_LC6_A25 = LCELL( _EQ063);
_EQ063 = !_LC5_A25
# !_LC2_A25 & !_LC3_A25 & !_LC4_A25;
-- Node name is '|COUNTER32B:9|~194~1'
-- Equation name is '_LC1_A25', type is buried
-- synthesized logic cell
_LC1_A25 = LCELL( _EQ064);
_EQ064 = !_LC2_A25
# _LC4_A25
# _LC3_A25;
-- Node name is '|FTCTRL:10|:5' = '|FTCTRL:10|Div2CLK'
-- Equation name is '_LC3_A36', type is buried
_LC3_A36 = DFFE(!_LC3_A36, GLOBAL( CLK), VCC, VCC, VCC);
-- Node name is '|HUO:18|:13'
-- Equation name is '_LC2_A36', type is buried
!_LC2_A36 = _LC2_A36~NOT;
_LC2_A36~NOT = LCELL( _EQ065);
_EQ065 = _LC3_A36 & !_LC5_A25
# _LC1_A25 & _LC3_A36
# CLK & !_LC5_A25
# CLK & _LC1_A25;
-- Node name is '|REG32B:11|:34'
-- Equation name is '_LC4_A36', type is buried
_LC4_A36 = DFFE( _LC5_A25, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:36'
-- Equation name is '_LC8_A35', type is buried
_LC8_A35 = DFFE( _LC4_A25, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:38'
-- Equation name is '_LC1_A33', type is buried
_LC1_A33 = DFFE( _LC3_A25, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:40'
-- Equation name is '_LC3_A35', type is buried
_LC3_A35 = DFFE( _LC2_A25, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:42'
-- Equation name is '_LC5_A35', type is buried
_LC5_A35 = DFFE( _LC3_A24, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:44'
-- Equation name is '_LC6_A33', type is buried
_LC6_A33 = DFFE( _LC2_A24, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:46'
-- Equation name is '_LC8_A36', type is buried
_LC8_A36 = DFFE( _LC1_A24, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:48'
-- Equation name is '_LC1_A36', type is buried
_LC1_A36 = DFFE( _LC5_A24, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:50'
-- Equation name is '_LC4_A33', type is buried
_LC4_A33 = DFFE( _LC4_A21, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:52'
-- Equation name is '_LC8_A28', type is buried
_LC8_A28 = DFFE( _LC5_A21, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:54'
-- Equation name is '_LC1_A28', type is buried
_LC1_A28 = DFFE( _LC2_A21, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:56'
-- Equation name is '_LC2_A35', type is buried
_LC2_A35 = DFFE( _LC1_A21, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:58'
-- Equation name is '_LC4_A35', type is buried
_LC4_A35 = DFFE( _LC1_A26, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:60'
-- Equation name is '_LC6_A35', type is buried
_LC6_A35 = DFFE( _LC5_A26, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:62'
-- Equation name is '_LC8_A33', type is buried
_LC8_A33 = DFFE( _LC3_A26, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:64'
-- Equation name is '_LC1_A1', type is buried
_LC1_A1 = DFFE( _LC4_A26, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:66'
-- Equation name is '_LC4_A4', type is buried
_LC4_A4 = DFFE( _LC1_A16, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:68'
-- Equation name is '_LC4_A6', type is buried
_LC4_A6 = DFFE( _LC2_A16, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:70'
-- Equation name is '_LC1_A6', type is buried
_LC1_A6 = DFFE( _LC3_A16, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:72'
-- Equation name is '_LC4_A8', type is buried
_LC4_A8 = DFFE( _LC4_A16, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:74'
-- Equation name is '_LC1_A8', type is buried
_LC1_A8 = DFFE( _LC5_A17, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:76'
-- Equation name is '_LC4_A10', type is buried
_LC4_A10 = DFFE( _LC2_A17, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:78'
-- Equation name is '_LC3_A28', type is buried
_LC3_A28 = DFFE( _LC4_A17, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:80'
-- Equation name is '_LC4_A32', type is buried
_LC4_A32 = DFFE( _LC1_A17, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:82'
-- Equation name is '_LC7_A33', type is buried
_LC7_A33 = DFFE( _LC3_A22, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:84'
-- Equation name is '_LC2_A33', type is buried
_LC2_A33 = DFFE( _LC2_A22, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:86'
-- Equation name is '_LC7_A35', type is buried
_LC7_A35 = DFFE( _LC4_A22, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:88'
-- Equation name is '_LC6_A36', type is buried
_LC6_A36 = DFFE( _LC5_A22, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:90'
-- Equation name is '_LC7_A36', type is buried
_LC7_A36 = DFFE( _LC2_A19, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:92'
-- Equation name is '_LC5_A36', type is buried
_LC5_A36 = DFFE( _LC3_A19, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:94'
-- Equation name is '_LC2_A28', type is buried
_LC2_A28 = DFFE( _LC4_A19, !_LC3_A36, VCC, VCC, VCC);
-- Node name is '|REG32B:11|:96'
-- Equation name is '_LC1_A35', type is buried
_LC1_A35 = DFFE( _LC5_A19, !_LC3_A36, VCC, VCC, VCC);
Project Information e:\eda\edakechengsheji\freqtest.rpt
** COMPILATION SETTINGS & TIMES **
Processing Menu Commands
------------------------
Design Doctor = off
Logic Synthesis:
Synthesis Type Used = Multi-Level
Default Synthesis Style = NORMAL
Logic option settings in 'NORMAL' style for 'ACEX1K' family
CARRY_CHAIN = ignore
CARRY_CHAIN_LENGTH = 32
CASCADE_CHAIN = ignore
CASCADE_CHAIN_LENGTH = 2
DECOMPOSE_GATES = on
DUPLICATE_LOGIC_EXTRACTION = on
MINIMIZATION = full
MULTI_LEVEL_FACTORING = on
NOT_GATE_PUSH_BACK = on
REDUCE_LOGIC = on
REFACTORIZATION = on
REGISTER_OPTIMIZATION = on
RESYNTHESIZE_NETWORK = on
SLOW_SLEW_RATE = off
SUBFACTOR_EXTRACTION = on
IGNORE_SOFT_BUFFERS = on
USE_LPM_FOR_AHDL_OPERATORS = off
Other logic synthesis settings:
Automatic Global Clock = on
Automatic Global Clear = on
Automatic Global Preset = on
Automatic Global Output Enable = on
Automatic Fast I/O = off
Automatic Register Packing = off
Automatic Open-Drain Pins = on
Automatic Implement in EAB = off
Optimize = 5
Default Timing Specifications: None
Cut All Bidir Feedback Timing Paths = on
Cut All Clear & Preset Timing Paths = on
Ignore Timing Assignments = off
Functional SNF Extractor = off
Linked SNF Extractor = off
Timing SNF Extractor = on
Optimize Timing SNF = off
Generate AHDL TDO File = off
Fitter Settings = NORMAL
Use Quartus Fitter = on
Smart Recompile = off
Total Recompile = off
Interfaces Menu Commands
------------------------
EDIF Netlist Writer = off
Verilog Netlist Writer = off
VHDL Netlist Writer = off
Compilation Times
-----------------
Compiler Netlist Extractor 00:00:00
Database Builder 00:00:00
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