ocld.cpp
来自「SAMSUNG S3C6410 CPU BSP for winmobile6」· C++ 代码 · 共 1,751 行 · 第 1/5 页
CPP
1,751 行
/*****************************************************************************/
/* */
/* PROJECT : ANYSTORE II */
/* MODULE : LLD */
/* NAME : OneNAND Controller Low-level Driver */
/* FILE : OCLD.cpp */
/* PURPOSE : OneNAND Controller LLD Implementation */
/* */
/*---------------------------------------------------------------------------*/
/* */
/* COPYRIGHT 2007-2008, SAMSUNG ELECTRONICS CO., LTD. */
/* ALL RIGHTS RESERVED */
/* */
/* Permission is hereby granted to licensees of Samsung Electronics */
/* Co., Ltd. products to use or abstract this computer program for the */
/* sole purpose of implementing NAND/OneNAND based on Samsung */
/* Electronics Co., Ltd. products. No other rights to reproduce, use, */
/* or disseminate this computer program, whether in part or in whole, */
/* are granted. */
/* */
/* Samsung Electronics Co., Ltd. makes no representations or warranties */
/* with respect to the performance of this computer program, and */
/* specifically disclaims any responsibility for any damages, */
/* special or consequential, connected with the use of this program. */
/* */
/*---------------------------------------------------------------------------*/
/* */
/* REVISION HISTORY */
/* */
/* - 06/MARCH/2007 [Yulwon Cho] : First writing */
/* */
/*****************************************************************************/
/*****************************************************************************/
/* Header file inclusion */
/*****************************************************************************/
#include <XSR.h>
/*****************************************************************************/
/* OCLD dedicated header file inclusion */
/*****************************************************************************/
#include "OCLD.h"
#include "OCLDReg.h"
#include <s3c6410.h>
#include <oal.h>
#include <bsp_cfg.h>
/*****************************************************************************/
/* Local Configurations */
/*****************************************************************************/
#undef STRICT_CHK
#ifdef ASYNC_MODE
#define DEFERRED_CHK /* Should be set defined */
#else /* SYNC_MODE */
#define DEFERRED_CHK /* User Can Modify it */
#endif
#define ALIGNED_MEMCPY /* User Can Modify it */
#undef LOCK_TIGHT /* for erase refresh, lock-tight should be disabled */
//#define USE_DMAC_PL080 /* User Can Modify it */
/*****************************************************************************/
/* Debug Configuration */
/*****************************************************************************/
#define _ONLD_DEBUG
#define _ONLD_ERR_TRACE
#define ONLD_RTL_PRINT(x) LLD_RTL_PRINT(x)
#if defined(_ONLD_ERR_TRACE)
#define ONLD_ERR_PRINT(x) LLD_RTL_PRINT(x)
#else
#define ONLD_ERR_PRINT(x)
#endif
#ifdef _ONLD_DEBUG
#define ONLD_DBG_PRINT(x) LLD_DBG_PRINT(x)
#else
#define ONLD_DBG_PRINT(x)
#endif
#define ONENANDCON_READ_FULL_SECTOR
#define ONENANDCON_CACHEREAD
//#define GET_CACHEREAD_RATIO // ksk dbg
#define ONENAND_READ_LED_ON // ksk dbg
/*****************************************************************************/
/* Function Redirection */
/*****************************************************************************/
#define MALLOC(x) OAM_Malloc(x)
#define FREE(x) OAM_Free(x)
#define MEMSET(x,y,z) OAM_Memset(x,y,z)
#define MEMCPY(x,y,z) PAM_Memcpy(x,y,z)
#define _SetRWRange _SetRWBlock
#define _LockTigRange _LockTigBlock
#if defined(USE_DMAC_PL080)
#define _ReadMainData(x,y,z) _ReadDataDMA(x,y,(z) * ONLD_MAIN_SIZE)
#define _WriteMainData(x,y,z) _WriteDataDMA(x,y,(z) * ONLD_MAIN_SIZE)
#else
#define _ReadMainData(x,y,z) _ReadData(x,y,z,ONLD_MAIN_SIZE)
#define _WriteMainData(x,y,z) _WriteData(x,y,z,ONLD_MAIN_SIZE)
#endif /* #if defined(USE_DMAC_PL080) */
#define _ReadSpareData(x,y,z) _ReadData(x,y,z,ONLD_SPARE_SIZE)
#define _WriteSpareData(x,y,z) _WriteData(x,y,z,ONLD_SPARE_SIZE)
/*****************************************************************************/
/* Local Constant Definiations */
/*****************************************************************************/
#define MAX_SUPPORT_DEVS 8
#define NUM_OF_DEVICES 1
#define ONLD_READ_UERROR_A 0xAAAA
#define ONLD_READ_CERROR_A 0x5555
#define ONLD_MAIN_SIZE 512
#define ONLD_SPARE_SIZE 16
#define BUFF_MAIN_SIZE 128
#define FIRSTCHIP 0
#define SECONDCHIP 512
#define CHIP_128M 0x0000
#define CHIP_256M 0x0010
#define CHIP_512M 0x0020
#define CHIP_1G 0x0030
#define CHIP_2G 0x0040
#define CHIP_4G 0x0050
#define M_DIE 0x0000
#define A_DIE 0x0100
#define B_DIE 0x0200
#define DDP_CHIP 0x0008
/* OneNand Block Lock Scheme or Range Lock Scheme or none */
#define BLK_LK 0
#define RNG_LK 1
#define NON_LK 2
#define MASK_8_BIT 0xFF
#define MASK_16_BIT 0xFFFF
#define MASK_32_BIT 0xFFFFFFFF
// OneNAND Transfer Mode Selection
#define OND_DMA (0x0)
#define OND_POL (0x1)
#define OND_LDM (0x2)
#define OND_TRANS_MODE (OND_LDM)
#if (OND_TRANS_MODE == OND_DMA)
#include "s3c6410_dma_controller_macro.h"
#include "s3c6410_dma_controller.h"
#define USE_SDMA
#endif // OND_TRANS_MODE
/* OneNand Block Lock Scheme or Range Lock Scheme or none */
#define SCLK_ONENAND_ON (1<<4)
/*****************************************************************************/
/* ONLD Return Code */
/*****************************************************************************/
/* Major Return Value */
#define ONLD_READ_DISTURBANCE LLD_READ_DISTURBANCE
#define ONLD_IOC_NOT_SUPPORT LLD_IOC_NOT_SUPPORT
#define ONLD_DEV_NOT_OPENED LLD_DEV_NOT_OPENED
#define ONLD_DEV_POWER_OFF LLD_DEV_POWER_OFF
#define ONLD_DEV_NO_LLD_FUNC LLD_DEV_NO_LLD_FUNC
#define ONLD_INIT_BADBLOCK LLD_INIT_BADBLOCK
#define ONLD_INIT_GOODBLOCK LLD_INIT_GOODBLOCK
#define ONLD_SUCCESS LLD_SUCCESS
#define ONLD_ERASE_ERROR LLD_ERASE_ERROR
#define ONLD_MERASE_ERROR LLD_MERASE_ERROR
#define ONLD_PREV_ERASE_ERROR LLD_PREV_ERASE_ERROR
#define ONLD_WRITE_ERROR LLD_WRITE_ERROR
#define ONLD_PREV_WRITE_ERROR LLD_PREV_WRITE_ERROR
#define ONLD_READ_ERROR LLD_READ_ERROR
#define ONLD_CRITICAL_ERROR LLD_CRITICAL_ERROR
#define ONLD_WR_PROTECT_ERROR LLD_WR_PROTECT_ERROR
#define ONLD_ILLEGAL_ACCESS LLD_ILLEGAL_ACCESS
#define ONLD_INIT_FAILURE LLD_INIT_FAILURE
#define ONLD_OPEN_FAILURE LLD_OPEN_FAILURE
#define ONLD_CLOSE_FAILURE LLD_CLOSE_FAILURE
/* Minor Retun Value */
/* Previous Operation Flag */
/* LLD_PREV_OP_RESULT is combined with Major Return Value, and means
Previous Operation Error except LLD_READ_ERROR */
#define ONLD_PREV_OP_RESULT LLD_PREV_OP_RESULT
/*****************************************************************************/
/* ONLD Operation Flag Code */
/*****************************************************************************/
#define ONLD_FLAG_ASYNC_OP LLD_FLAG_ASYNC_OP /* Write/Erase/Copy */
#define ONLD_FLAG_SYNC_OP LLD_FLAG_SYNC_OP /* Write/Erase/Copy */
#define ONLD_FLAG_SYNC_MASK (1 << 0) /* Write/Erase/Copy */
#define ONLD_FLAG_ECC_ON LLD_FLAG_ECC_ON
#define ONLD_FLAG_ECC_OFF LLD_FLAG_ECC_OFF
#define X08 LLD_BW_X08
#define X16 LLD_BW_X16
/* Multiple Erase support or not */
#define ME_OK LLD_ME_OK
#define ME_NO LLD_ME_NO
/*****************************************************************************/
/* Local Data Structure */
/*****************************************************************************/
typedef struct
{
UINT16 nMID; /* Manufacturer ID */
UINT16 nDID; /* Device ID */
UINT16 nGEN; /* Version ID */
UINT16 nNumOfBlks; /* Number of Blocks */
UINT16 nNumOfPlanes; /* Number of Planes */
UINT16 nBlksInRsv; /* The Number of Blocks */
/* in Reservior for Bad Blocks */
UINT8 nBadPos; /* BadBlock Information Poisition */
UINT8 nLsnPos; /* LSN Position */
UINT8 nEccPos; /* ECC Policy : HW_ECC, SW_ECC */
UINT8 nBWidth; /* Device Band Width */
UINT8 nMEFlag; /* Multiple Erase Flag */
UINT8 nLKFlag; /* Lock scheme Flag */
UINT32 nTrTime; /* Typical Read Op Time */
UINT32 nTwTime; /* Typical Write Op Time */
UINT32 nTeTime; /* Typical Erase Op Time */
UINT32 nTfTime; /* Typical Transfer Op Time */
} ONLDSpec;
typedef struct
{
UINT32 nFBAShift;
UINT32 nFPAShift;
UINT32 nFSAShift;
UINT32 nDFSDBSShift;
UINT32 nFBAMask;
UINT32 nFPAMask;
UINT32 nFSAMask;
UINT32 nDFSDBSMask;
}ONLDMemAddr;
typedef struct
{
UINT32 BaseAddr; /* Device Mapped Base Address */
BOOL32 bOpen; /* Device Open Flag */
BOOL32 bPower; /* Device Power Flag */
ONLDSpec* pstDevSpec; /* Device Information(Spec) pointer */
} ONLDDev;
typedef struct
{
UINT8 nBufSelSft;
UINT8 nSctSelSft;
UINT8 nBlkSelSft;
UINT8 nPgSelSft;
UINT8 nDDPSelSft;
UINT8 nFPASelSft;
UINT8 nFSAMask;
UINT8 nSctsPerPG;
UINT32 (*SetRWArea) (UINT32 nDev, UINT32 nSUbn, UINT32 nUBlks);
UINT32 (*LockTight) (UINT32 nDev, UINT8 *pBufI, UINT32 nLenI);
INT32 (*MRead) (UINT32 nDev, UINT32 nPsn, UINT32 nScts,
SGL *pstSGL, UINT8 *pSBuf, UINT32 nFlag);
}ONLDInfo;
#if defined(DEFERRED_CHK)
typedef enum {
NONE = 0,
READ = 1,
WRITE = 2,
ERASE = 3,
CPBACK = 4,
MERASE = 5
}OpType;
#endif /* #if defined(DEFERRED_CHK) */
typedef struct
{
#if defined(DEFERRED_CHK)
OpType ePreOp;
UINT32 nPsn;
UINT32 nScts;
UINT32 nFlag;
UINT16 nCmd;
LLDMEArg* pstPreMEArg;
#endif /* #if defined(DEFERRED_CHK)*/
UINT16 nBufSel;
}PrevOpInfo;
/*****************************************************************************/
/* Local Variable */
/*****************************************************************************/
static UINT16 ONLD_CMD_LOCK_NAND;
static UINT16 ONLD_CMD_LOCK_TIGHT;
static ONLDInfo astONLDInfo[MAX_SUPPORT_DEVS];
static PrevOpInfo *pstPrevOpInfo[MAX_SUPPORT_DEVS];
static ONLDMemAddr astONLDMemAddr[MAX_SUPPORT_DEVS];
static ONLDDev astONLDDev[MAX_SUPPORT_DEVS];
#ifdef GET_CACHEREAD_RATIO
#define READPAGE_DIV 65 // 0, 1, 2, 3, 4 ~ 64
static UINT32 g_nTotPagesCnt[READPAGE_DIV];
static UINT32 g_nTotWSctCnt[READPAGE_DIV];
static UINT32 g_nPushedSigRd;
static UINT32 g_nPushedSigWr;
volatile S3C6410_GPIO_REG *g_pGPIOReg = NULL;
#endif // GET_CACHEREAD_RATIO
#ifdef ONENAND_READ_LED_ON
volatile S3C6410_GPIO_REG *g_pGPIOReg = NULL;
#endif // ONENAND_READ_LED_ON
#if (OND_TRANS_MODE == OND_DMA)
#define CACHED_TO_UNCACHED_OFFSET 0x20000000
#define ONLD_PHYSICAL_TO_VIRTUAL_OFFSET 0x76000000 // physical : 0x20000000, cached : 0x96000000, non-cached : 0xb6000000
#define ONLD_PAGEDATA_PA_BASEADDR 0x577FF7C0
#define ONLD_PAGEDATA_VA_BASEADDR 0x877FF7C0
static volatile S3C6410_DMAC_REG *g_pDMAC0Reg;
static volatile S3C6410_SYSCON_REG *g_pSYSCONReg;
static UINT32 g_nDMABufferPhyPage;
static UINT32 g_nDMABufferVirPage;
#endif // OND_TRANS_MODE
static ONLDSpec astNandSpec[] = {
/*****************************************************************************/
/*nMID, nDID, nGEN, nNumOfBlks, */
/* nNumOfPlanes */
/* nBlocksInRsv */
/* nBadPos */
/* nLsnPos */
/* nEccPos */
/* nBWidth */
/* nMEFlag */
/* nLKFlag */
/* nTrTime;(ns) */
/* nTwTime;(ns) */
/* nTeTime;(ns)*/
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