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📄 prev_cmp_original_signal.qmsg

📁 一种基于LUT的预失真方法。其中的一部分
💻 QMSG
📖 第 1 页 / 共 5 页
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{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "mod.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file mod.v" { { "Info" "ISGN_ENTITY_NAME" "1 mod " "Info: Found entity 1: mod" {  } { { "mod.v" "" { Text "E:/Graduation_Design/Quartus/original_signal/mod.v" 27 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "original_signal.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file original_signal.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 original_signal " "Info: Found entity 1: original_signal" {  } { { "original_signal.bdf" "" { Schematic "E:/Graduation_Design/Quartus/original_signal/original_signal.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "org2T.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file org2T.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 org2T " "Info: Found entity 1: org2T" {  } { { "org2T.bdf" "" { Schematic "E:/Graduation_Design/Quartus/original_signal/org2T.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "OFDMrom_center_zero.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file OFDMrom_center_zero.v" { { "Info" "ISGN_ENTITY_NAME" "1 OFDMrom_center_zero " "Info: Found entity 1: OFDMrom_center_zero" {  } { { "OFDMrom_center_zero.v" "" { Text "E:/Graduation_Design/Quartus/original_signal/OFDMrom_center_zero.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "OFDMrom_center_167.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file OFDMrom_center_167.v" { { "Info" "ISGN_ENTITY_NAME" "1 OFDMrom_center_167 " "Info: Found entity 1: OFDMrom_center_167" {  } { { "OFDMrom_center_167.v" "" { Text "E:/Graduation_Design/Quartus/original_signal/OFDMrom_center_167.v" 1 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0 "" 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "original_signal " "Info: Elaborating entity \"original_signal\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "dds2ch dds2ch:inst3 " "Info: Elaborating entity \"dds2ch\" for hierarchy \"dds2ch:inst3\"" {  } { { "original_signal.bdf" "inst3" { Schematic "E:/Graduation_Design/Quartus/original_signal/original_signal.bdf" { { 384 432 784 512 "inst3" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "accl dds2ch:inst3\|accl:U_accl " "Info: Elaborating entity \"accl\" for hierarchy \"dds2ch:inst3\|accl:U_accl\"" {  } { { "dds2ch.v" "U_accl" { Text "E:/Graduation_Design/Quartus/original_signal/dds2ch.v" 71 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "bctrl dds2ch:inst3\|bctrl:U_bctrl " "Info: Elaborating entity \"bctrl\" for hierarchy \"dds2ch:inst3\|bctrl:U_bctrl\"" {  } { { "dds2ch.v" "U_bctrl" { Text "E:/Graduation_Design/Quartus/original_signal/dds2ch.v" 84 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "inverter dds2ch:inst3\|inverter:U_inverter " "Info: Elaborating entity \"inverter\" for hierarchy \"dds2ch:inst3\|inverter:U_inverter\"" {  } { { "dds2ch.v" "U_inverter" { Text "E:/Graduation_Design/Quartus/original_signal/dds2ch.v" 92 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "romwl dds2ch:inst3\|romwl:U_romwl " "Info: Elaborating entity \"romwl\" for hierarchy \"dds2ch:inst3\|romwl:U_romwl\"" {  } { { "dds2ch.v" "U_romwl" { Text "E:/Graduation_Design/Quartus/original_signal/dds2ch.v" 101 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "romcl dds2ch:inst3\|romcl:U_romcl " "Info: Elaborating entity \"romcl\" for hierarchy \"dds2ch:inst3\|romcl:U_romcl\"" {  } { { "dds2ch.v" "U_romcl" { Text "E:/Graduation_Design/Quartus/original_signal/dds2ch.v" 110 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mux dds2ch:inst3\|mux:U_mux " "Info: Elaborating entity \"mux\" for hierarchy \"dds2ch:inst3\|mux:U_mux\"" {  } { { "dds2ch.v" "U_mux" { Text "E:/Graduation_Design/Quartus/original_signal/dds2ch.v" 126 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "muad dds2ch:inst3\|muad:U_muad " "Info: Elaborating entity \"muad\" for hierarchy \"dds2ch:inst3\|muad:U_muad\"" {  } { { "dds2ch.v" "U_muad" { Text "E:/Graduation_Design/Quartus/original_signal/dds2ch.v" 141 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "add dds2ch:inst3\|muad:U_muad\|add:U_add " "Info: Elaborating entity \"add\" for hierarchy \"dds2ch:inst3\|muad:U_muad\|add:U_add\"" {  } { { "dds2ch.v" "U_add" { Text "E:/Graduation_Design/Quartus/original_signal/dds2ch.v" 857 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "sub dds2ch:inst3\|muad:U_muad\|sub:U_sub " "Info: Elaborating entity \"sub\" for hierarchy \"dds2ch:inst3\|muad:U_muad\|sub:U_sub\"" {  } { { "dds2ch.v" "U_sub" { Text "E:/Graduation_Design/Quartus/original_signal/dds2ch.v" 863 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "mult dds2ch:inst3\|muad:U_muad\|mult:U_mult " "Info: Elaborating entity \"mult\" for hierarchy \"dds2ch:inst3\|muad:U_muad\|mult:U_mult\"" {  } { { "dds2ch.v" "U_mult" { Text "E:/Graduation_Design/Quartus/original_signal/dds2ch.v" 884 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "delayl dds2ch:inst3\|muad:U_muad\|delayl:U_delayl " "Info: Elaborating entity \"delayl\" for hierarchy \"dds2ch:inst3\|muad:U_muad\|delayl:U_delayl\"" {  } { { "dds2ch.v" "U_delayl" { Text "E:/Graduation_Design/Quartus/original_signal/dds2ch.v" 900 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "out dds2ch:inst3\|out:U_out " "Info: Elaborating entity \"out\" for hierarchy \"dds2ch:inst3\|out:U_out\"" {  } { { "dds2ch.v" "U_out" { Text "E:/Graduation_Design/Quartus/original_signal/dds2ch.v" 157 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "addo dds2ch:inst3\|out:U_out\|addo:U_addo " "Info: Elaborating entity \"addo\" for hierarchy \"dds2ch:inst3\|out:U_out\|addo:U_addo\"" {  } { { "dds2ch.v" "U_addo" { Text "E:/Graduation_Design/Quartus/original_signal/dds2ch.v" 1104 0 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "frecontr frecontr:inst2 " "Info: Elaborating entity \"frecontr\" for hierarchy \"frecontr:inst2\"" {  } { { "original_signal.bdf" "inst2" { Schematic "E:/Graduation_Design/Quartus/original_signal/original_signal.bdf" { { 552 160 368 648 "inst2" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0 "" 0}

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