original_signal.qsf

一种基于LUT的预失真方法。其中的一部分

# Copyright (C) 1991-2007 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.


# The default values for assignments are stored in the file
#		original_signal_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


set_global_assignment -name DEVICE EP3C25Q240C8
set_global_assignment -name FAMILY "Cyclone III"
set_global_assignment -name TOP_LEVEL_ENTITY original_signal
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "7.1 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "10:00:41  NOVEMBER 04, 2007"
set_global_assignment -name LAST_QUARTUS_VERSION "7.1 SP1"
set_global_assignment -name DEVICE_FILTER_PIN_COUNT ANY
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE ANY
set_location_assignment PIN_218 -to RstN
set_location_assignment PIN_147 -to Dataout[15]
set_location_assignment PIN_146 -to Dataout[14]
set_location_assignment PIN_145 -to Dataout[13]
set_location_assignment PIN_144 -to Dataout[12]
set_location_assignment PIN_143 -to Dataout[11]
set_location_assignment PIN_142 -to Dataout[10]
set_location_assignment PIN_139 -to Dataout[9]
set_location_assignment PIN_137 -to Dataout[8]
set_location_assignment PIN_135 -to Dataout[7]
set_location_assignment PIN_134 -to Dataout[6]
set_location_assignment PIN_133 -to Dataout[5]
set_location_assignment PIN_132 -to Dataout[4]
set_location_assignment PIN_148 -to pin_name
set_global_assignment -name USE_TIMEQUEST_TIMING_ANALYZER OFF
set_global_assignment -name IGNORE_CLOCK_SETTINGS ON
set_global_assignment -name FMAX_REQUIREMENT "140 MHz"
set_location_assignment PIN_31 -to clkin
set_global_assignment -name FMAX_REQUIREMENT "52 MHz" -section_id clk
set_instance_assignment -name CLOCK_SETTINGS clk -to clkin
set_global_assignment -name FMAX_REQUIREMENT "3 MHz" -section_id clk_3M
set_global_assignment -name FMAX_REQUIREMENT "70 MHz" -section_id clk_70M
set_instance_assignment -name CLOCK_SETTINGS clk_3M -to "CLK_ALL_GEN:inst5|count[4]"
set_instance_assignment -name CLOCK_SETTINGS clk_70M -to pin_name
set_instance_assignment -name CLOCK_SETTINGS clk_70M -to "altpll0:inst6|altpll:altpll_component|altpll_7f31:auto_generated|clk[0]"
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_global_assignment -name VERILOG_FILE FIR/MyCofRom.v
set_global_assignment -name VERILOG_FILE FIR/FIRInterp.v
set_global_assignment -name VERILOG_FILE CICsilu.v
set_global_assignment -name VERILOG_FILE OFDMrom.v
set_global_assignment -name VERILOG_FILE datarom.v
set_global_assignment -name VERILOG_FILE HBFirCof.V
set_global_assignment -name VERILOG_FILE FIRHB.v
set_global_assignment -name VERILOG_FILE CLK_ALL_GEN.v
set_global_assignment -name VERILOG_FILE ROMDataTable.v
set_global_assignment -name VERILOG_FILE CICnew.v
set_global_assignment -name VERILOG_FILE DABDataOut.v
set_global_assignment -name VERILOG_FILE dds2ch.v
set_global_assignment -name VERILOG_FILE frecontr.v
set_global_assignment -name VERILOG_FILE mod.v
set_global_assignment -name BDF_FILE original_signal.bdf
set_global_assignment -name BDF_FILE org2T.bdf
set_global_assignment -name VERILOG_FILE OFDMrom_center_zero.v
set_global_assignment -name VERILOG_FILE OFDMrom_center_167.v