isim.log

来自「Source codes for verilog fifo for sparta」· LOG 代码 · 共 33 行

 command line:
   ./test123_isim_beh.exe
     -intstyle  ise
     -ipchost  localhost
     -ipcport  1500

Wed Jan 21 18:11:37 2009

Total Line Count = 83

 Elaboration time 0.015625 sec.

 Estimate current memory usage 35.0454 Meg. 

 Total signals 29
 Total nets 18
 Total signal drivers 14
 Total blocks 7
 Total primitive blocks 5
 Total processes 22
ntrace select -o on -n /test123/Q 
ntrace select -o on -n /test123/clk 
ntrace select -o on -n /test123/reset 
ntrace select -o on -n /test123/r1/p 
ntrace select -o on -n /test123/r1/p 
ntrace select -o on -n /test123/r1/p 
ntrace select -o on -n /test123/r1/p 
ntrace select -o on -n /test123/r1/p 
ntrace start 
run 1000 ns 
Simulator is doing circuit initialization process.
Finished circuit initialization process.