da_tlc5620.cbx.xml

用verilong hdl语言编写的数据采样程序

<?xml version="1.0" ?>
<LOG_ROOT>
	<PROJECT NAME="DA_TLC5620">
		<CBX_INST_ENTRY INSTANCE_NAME="|DA_TLC5620|dac_test:M2|lpm_divide:Div0" CBX_FILE_NAME="lpm_divide_q6m.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|DA_TLC5620|dac_test:M2|lpm_divide:Div2" CBX_FILE_NAME="lpm_divide_78m.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|DA_TLC5620|dac_test:M2|lpm_divide:Mod1" CBX_FILE_NAME="lpm_divide_tul.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|DA_TLC5620|dac_test:M2|lpm_divide:Mod3" CBX_FILE_NAME="lpm_divide_tul.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|DA_TLC5620|dac_test:M2|lpm_divide:Div1" CBX_FILE_NAME="lpm_divide_t6m.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|DA_TLC5620|dac_test:M2|lpm_divide:Mod0" CBX_FILE_NAME="lpm_divide_tul.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|DA_TLC5620|dac_test:M2|lpm_divide:Mod2" CBX_FILE_NAME="lpm_divide_tul.tdf"/>
		<CBX_INST_ENTRY INSTANCE_NAME="|DA_TLC5620|dac_test:M2|lpm_mult:Mult0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]" CBX_FILE_NAME="add_sub_l4h.tdf"/>
	</PROJECT>
</LOG_ROOT>