convolution.map.summary

本例是关于卷积码的一个简单算法

Analysis & Synthesis Status : Successful - Wed Apr 01 17:10:34 2009
Quartus II Version : 8.1 Build 163 10/28/2008 SJ Full Version
Revision Name : convolution
Top-level Entity Name : convolution
Family : Stratix II
Logic utilization : N/A
    Combinational ALUTs : 7
    Dedicated logic registers : 6
Total registers : 6
Total pins : 8
Total virtual pins : 0
Total block memory bits : 0
DSP block 9-bit elements : 0
Total PLLs : 0
Total DLLs : 0